mirror of
https://github.com/yuzu-emu/FasTC.git
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ca85a663a1
Atomic operations are both supported by the platform and the compiler. If we want to provide a threadsafe implementation of our compression function, we need to make sure that the proper settings are available.
236 lines
6.5 KiB
CMake
236 lines
6.5 KiB
CMake
# FasTC
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# Copyright (c) 2012 University of North Carolina at Chapel Hill. All rights reserved.
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#
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# Permission to use, copy, modify, and distribute this software and its documentation for educational,
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# research, and non-profit purposes, without fee, and without a written agreement is hereby granted,
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# provided that the above copyright notice, this paragraph, and the following four paragraphs appear
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# in all copies.
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#
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# Permission to incorporate this software into commercial products may be obtained by contacting the
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# authors or the Office of Technology Development at the University of North Carolina at Chapel Hill <otd@unc.edu>.
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#
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# This software program and documentation are copyrighted by the University of North Carolina at Chapel Hill.
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# The software program and documentation are supplied "as is," without any accompanying services from the
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# University of North Carolina at Chapel Hill or the authors. The University of North Carolina at Chapel Hill
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# and the authors do not warrant that the operation of the program will be uninterrupted or error-free. The
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# end-user understands that the program was developed for research purposes and is advised not to rely
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# exclusively on the program for any reason.
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#
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# IN NO EVENT SHALL THE UNIVERSITY OF NORTH CAROLINA AT CHAPEL HILL OR THE AUTHORS BE LIABLE TO ANY PARTY FOR
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# DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS, ARISING OUT OF THE
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# USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF NORTH CAROLINA AT CHAPEL HILL OR THE
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# AUTHORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# THE UNIVERSITY OF NORTH CAROLINA AT CHAPEL HILL AND THE AUTHORS SPECIFICALLY DISCLAIM ANY WARRANTIES, INCLUDING,
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# BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND ANY
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# STATUTORY WARRANTY OF NON-INFRINGEMENT. THE SOFTWARE PROVIDED HEREUNDER IS ON AN "AS IS" BASIS, AND THE UNIVERSITY
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# OF NORTH CAROLINA AT CHAPEL HILL AND THE AUTHORS HAVE NO OBLIGATIONS TO PROVIDE MAINTENANCE, SUPPORT, UPDATES,
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# ENHANCEMENTS, OR MODIFICATIONS.
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#
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# Please send all BUG REPORTS to <pavel@cs.unc.edu>.
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#
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# The authors may be contacted via:
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#
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# Pavel Krajcevski
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# Dept of Computer Science
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# 201 S Columbia St
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# Frederick P. Brooks, Jr. Computer Science Bldg
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# Chapel Hill, NC 27599-3175
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# USA
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#
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# <http://gamma.cs.unc.edu/FasTC/>
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INCLUDE_DIRECTORIES(${TexC_SOURCE_DIR}/Core/include)
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INCLUDE_DIRECTORIES(${TexC_SOURCE_DIR}/BPTCEncoder/include)
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INCLUDE_DIRECTORIES(${TexC_BINARY_DIR}/BPTCEncoder/include)
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INCLUDE(CheckCXXSourceRuns)
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#SET(OLD_CMAKE_REQUIRED_FLAGS ${CMAKE_REQUIRED_FLAGS})
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#IF(CMAKE_COMPILER_IS_GNUCC)
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#
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# # Test whether or not the compiler allows inline
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# # assmbly...
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# CHECK_CXX_SOURCE_RUNS("
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# \#ifdef _MSC_VER
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# int main() {
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# int x = 1, y = 0;
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# __asm {
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# mov eax, x
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# mov y, eax
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# }
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# return !y;
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# }
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# \#else
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# int main() {
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# int x = 1, y = 0;
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# __asm__ (\"movl %1, %%eax;\"
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# \"movl %%eax, %0;\"
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# :\"=r\"(y) /* output */
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# :\"r\"(x) /* input */
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# :\"%eax\" /* clobbered register */
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# );
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#
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# return !y;
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# }
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# \#endif"
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# HAS_INLINE_ASSEMBLY
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# )
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#
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# # If the compiler doesn't allow it, then try with a
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# # compiler flag...
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# IF( NOT HAS_INLINE_ASSEMBLY )
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# SET(CMAKE_REQUIRED_FLAGS -fasm-blocks)
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# CHECK_CXX_SOURCE_RUNS("
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# \#ifdef _MSC_VER
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# int main() {
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# int x = 1, y = 0;
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# __asm {
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# mov eax, x
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# mov y, eax
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# }
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# return !y;
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# }
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# \#else
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# int main() {
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# int x = 1, y = 0;
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# __asm__ (\"movl %1, %%eax;\"
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# \"movl %%eax, %0;\"
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# :\"=r\"(y) /* output */
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# :\"r\"(x) /* input */
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# :\"%eax\" /* clobbered register */
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# );
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#
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# return !y;
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# }
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# \#endif"
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# HAS_INLINE_ASSEMBLY_WITH_FLAGS
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# )
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# ENDIF()
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#
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# SET(CMAKE_REQUIRED_FLAGS -msse4.1)
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# CHECK_CXX_SOURCE_RUNS("
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# #include <smmintrin.h>
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# int main() {
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# const __m128 fv = _mm_set1_ps(1.0f);
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# const __m128 fv2 = _mm_set1_ps(2.0f);
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#
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# const __m128 ans = _mm_blend_ps(fv, fv2, 2);
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#
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# return ((int *)(&ans))[0];
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# }"
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# HAS_SSE_41
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# )
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#
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# IF(HAS_SSE_41)
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# SET(CMAKE_REQUIRED_FLAGS -msse4.2)
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# CHECK_CXX_SOURCE_RUNS("
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# #include <smmintrin.h>
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# int main() {
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# const unsigned int testMe = 5;
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# return !(2 == _mm_popcnt_u32(testMe));
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# }"
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# HAS_SSE_POPCNT
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# )
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# ENDIF(HAS_SSE_41)
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#
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#ELSEIF(MSVC)
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##!FIXME!
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#ENDIF()
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#SET(CMAKE_REQUIRED_FLAGS ${OLD_CMAKE_REQUIRED_FLAGS})
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IF( NOT HAS_INLINE_ASSEMBLY AND NOT HAS_INLINE_ASSEMBLY_WITH_FLAGS )
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SET( NO_INLINE_ASSEMBLY true )
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ENDIF()
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# Check to see whether or not our compiler supports atomic operations
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IF( CMAKE_COMPILER_IS_GNUCC OR CMAKE_COMPILER_IS_GNUCXX )
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CHECK_CXX_SOURCE_RUNS("
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int main() {
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int x = 0;
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__sync_fetch_and_add(&x, 1);
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return !x;
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}"
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HAS_GCC_ATOMICS
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)
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ELSEIF( MSVC )
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CHECK_CXX_SOURCE_RUNS("
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#include <Windows.h>
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int main() {
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int *x = _aligned_malloc(sizeof(int), 32);
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x = InterlockedIncrement(&x);
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free(x);
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return !x;
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}"
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HAS_MSVC_ATOMICS
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)
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ENDIF()
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IF( HAS_MSVC_ATOMICS OR HAS_GCC_ATOMICS )
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SET(HAS_ATOMICS true)
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ENDIF()
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CONFIGURE_FILE(
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"config/BC7Config.h.in"
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"include/BC7Config.h"
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)
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SET( HEADERS
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src/BC7CompressionMode.h
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src/BitStream.h
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src/RGBAEndpoints.h
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src/ParallelStage.h
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)
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SET( SOURCES
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src/BC7Compressor.cpp
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src/RGBAEndpoints.cpp
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src/ParallelStage.cpp
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)
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IF( HAS_SSE_41 )
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IF ( HAS_SSE_POPCNT )
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IF( MSVC )
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ADD_DEFINITIONS( /arch:SSE4.2 )
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ELSE() #Assume GCC
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ADD_DEFINITIONS( -msse4.2 )
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ENDIF()
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ELSE()
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IF( MSVC )
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ADD_DEFINITIONS( /arch:SSE4.1 )
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ELSE() #Assume GCC
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ADD_DEFINITIONS( -msse4.1 )
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ENDIF()
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ENDIF()
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SET( HEADERS
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${HEADERS}
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src/RGBAEndpointsSIMD.h
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src/BC7CompressionModeSIMD.h
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)
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SET( SOURCES
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${SOURCES}
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src/BC7CompressorSIMD.cpp
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src/RGBAEndpointsSIMD.cpp
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)
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ENDIF( HAS_SSE_41 )
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IF( HAS_INLINE_ASSEMBLY_WITH_FLAGS )
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IF( MSVC )
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# !FIXME!
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ELSE()
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ADD_DEFINITIONS( -fasm-blocks )
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ENDIF()
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ENDIF()
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ADD_LIBRARY( BPTCEncoder
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${HEADERS}
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${SOURCES}
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)
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