mirror of
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Modify RISCV minidump context to match Crashpad
- RISCV32 will only include support for 32 bit floating point registers - RISCV64 will only include support for 64 bit floating point registers - RISCV 32/64 context will include a "version" field to account for future extensions Fixed: 1447862 Tested: `make check` on x86 host Tested: `minidump_stackwalk` for RISCV64 minidump on x86 host Change-Id: I605d5b2c35e627a5dc986aaf818a9c9898f6ae0b Reviewed-on: https://chromium-review.googlesource.com/c/breakpad/breakpad/+/4553281 Reviewed-by: Joshua Peraza <jperaza@chromium.org>
This commit is contained in:
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@ -322,23 +322,19 @@ void ThreadInfo::FillCPUContext(RawContextCPU* out) const {
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out->t5 = mcontext.__gregs[30];
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out->t5 = mcontext.__gregs[30];
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out->t6 = mcontext.__gregs[31];
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out->t6 = mcontext.__gregs[31];
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# if __riscv_flen == 32
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// Breakpad only supports RISCV32 with 32 bit floating point.
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for(int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; i++)
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// Breakpad only supports RISCV64 with 64 bit floating point.
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out->float_save.regs[i] = mcontext.__fpregs.__f.__f[i];
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#if __riscv_xlen == 32
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out->float_save.fpcsr = mcontext.__fpregs.__f.__fcsr;
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for (int i = 0; i < MD_CONTEXT_RISCV_FPR_COUNT; i++)
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# elif __riscv_flen == 64
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out->fpregs[i] = mcontext.__fpregs.__f.__f[i];
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for(int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; i++)
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out->fcsr = mcontext.__fpregs.__f.__fcsr;
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out->float_save.regs[i] = mcontext.__fpregs.__d.__f[i];
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#elif __riscv_xlen == 64
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out->float_save.fpcsr = mcontext.__fpregs.__d.__fcsr;
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for (int i = 0; i < MD_CONTEXT_RISCV_FPR_COUNT; i++)
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# elif __riscv_flen == 128
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out->fpregs[i] = mcontext.__fpregs.__d.__f[i];
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for(int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; i++) {
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out->fcsr = mcontext.__fpregs.__d.__fcsr;
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out->float_save.regs[i].high = mcontext.__fpregs.__q.__f[2*i];
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#else
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out->float_save.regs[i].low = mcontext.__fpregs.__q.__f[2*i+1];
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#error "Unexpected __riscv_xlen"
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}
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#endif
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out->float_save.fpcsr = mcontext.__fpregs.__q.__fcsr;
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# else
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# error "Unexpected __riscv_flen"
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# endif
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}
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}
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#endif // __riscv
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#endif // __riscv
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@ -310,21 +310,19 @@ void UContextReader::FillCPUContext(RawContextCPU* out, const ucontext_t* uc) {
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out->t5 = uc->uc_mcontext.__gregs[30];
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out->t5 = uc->uc_mcontext.__gregs[30];
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out->t6 = uc->uc_mcontext.__gregs[31];
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out->t6 = uc->uc_mcontext.__gregs[31];
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# if __riscv_flen == 32
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// Breakpad only supports RISCV32 with 32 bit floating point.
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for(int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; i++)
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// Breakpad only supports RISCV64 with 64 bit floating point.
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out->float_save.regs[i] = uc->uc_mcontext.__fpregs.__f.__f[i];
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#if __riscv_xlen == 32
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out->float_save.fpcsr = uc->uc_mcontext.__fpregs.__f.__fcsr;
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for (int i = 0; i < MD_CONTEXT_RISCV_FPR_COUNT; i++)
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# elif __riscv_flen == 64
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out->fpregs[i] = uc->uc_mcontext.__fpregs.__f.__f[i];
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for(int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; i++)
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out->fcsr = uc->uc_mcontext.__fpregs.__f.__fcsr;
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out->float_save.regs[i] = uc->uc_mcontext.__fpregs.__d.__f[i];
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#elif __riscv_xlen == 64
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out->float_save.fpcsr = uc->uc_mcontext.__fpregs.__d.__fcsr;
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for (int i = 0; i < MD_CONTEXT_RISCV_FPR_COUNT; i++)
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# elif __riscv_flen == 128
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out->fpregs[i] = uc->uc_mcontext.__fpregs.__d.__f[i];
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for(int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; i++) {
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out->fcsr = uc->uc_mcontext.__fpregs.__d.__fcsr;
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out->float_save.regs[i].high = uc->uc_mcontext.__fpregs.__q.__f[2*i];
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#else
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out->float_save.regs[i].low = uc->uc_mcontext.__fpregs.__q.__f[2*i+1];
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#error "Unexpected __riscv_xlen"
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}
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#endif
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out->float_save.fpcsr = uc->uc_mcontext.__fpregs.__q.__fcsr;
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# endif
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}
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}
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#endif
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#endif
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@ -39,28 +39,8 @@
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#include "google_breakpad/common/breakpad_types.h"
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#include "google_breakpad/common/breakpad_types.h"
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#define MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT 32
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#if defined(__riscv)
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# if __riscv_flen == 32
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typedef uint32_t riscv_fpr_size;
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# elif __riscv_flen == 64
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typedef uint64_t riscv_fpr_size;
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# elif __riscv_flen == 128
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typedef uint128_struct riscv_fpr_size;
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# else
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# error "Unexpected __riscv_flen"
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# endif
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#else
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typedef uint32_t riscv_fpr_size;
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#endif
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#define MD_CONTEXT_RISCV_GPR_COUNT 32
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#define MD_CONTEXT_RISCV_GPR_COUNT 32
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#define MD_CONTEXT_RISCV_FPR_COUNT 32
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typedef struct {
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/* 32 floating point registers, f0 .. f31. */
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riscv_fpr_size regs[MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT];
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uint32_t fpcsr;
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} MDFloatingSaveAreaRISCV;
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enum MDRISCVRegisterNumbers {
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enum MDRISCVRegisterNumbers {
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MD_CONTEXT_RISCV_REG_PC = 0,
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MD_CONTEXT_RISCV_REG_PC = 0,
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@ -72,13 +52,14 @@ enum MDRISCVRegisterNumbers {
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* context stored in the structure. */
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* context stored in the structure. */
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#define MD_CONTEXT_RISCV 0x00800000
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#define MD_CONTEXT_RISCV 0x00800000
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#define MD_CONTEXT_RISCV_INTEGER (MD_CONTEXT_RISCV | 0x00000001)
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#define MD_CONTEXT_RISCV_INTEGER (MD_CONTEXT_RISCV | 0x00000001)
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#define MD_CONTEXT_RISCV_FLOATING_POINT (MD_CONTEXT_RISCV | 0x00000004)
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#define MD_CONTEXT_RISCV_FLOATING_POINT (MD_CONTEXT_RISCV | 0x00000002)
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#define MD_CONTEXT_RISCV_FULL (MD_CONTEXT_RISCV_INTEGER | \
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#define MD_CONTEXT_RISCV_FULL (MD_CONTEXT_RISCV_INTEGER | \
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MD_CONTEXT_RISCV_FLOATING_POINT)
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MD_CONTEXT_RISCV_FLOATING_POINT)
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typedef struct {
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typedef struct {
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/* Determines which fields of this struct are populated */
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/* Determines which fields of this struct are populated */
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uint32_t context_flags;
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uint32_t context_flags;
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uint32_t version;
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uint32_t pc;
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uint32_t pc;
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uint32_t ra;
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uint32_t ra;
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@ -113,20 +94,24 @@ typedef struct {
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uint32_t t5;
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uint32_t t5;
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uint32_t t6;
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uint32_t t6;
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MDFloatingSaveAreaRISCV float_save;
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/* 32 floating point registers, f0 .. f31. Breakpad only supports RISCV32
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* with 32 bit floating point. */
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uint32_t fpregs[MD_CONTEXT_RISCV_FPR_COUNT];
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uint32_t fcsr;
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} MDRawContextRISCV;
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} MDRawContextRISCV;
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/* For (MDRawContextRISCV64).context_flags. These values indicate the type of
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/* For (MDRawContextRISCV64).context_flags. These values indicate the type of
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* context stored in the structure. */
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* context stored in the structure. */
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#define MD_CONTEXT_RISCV64 0x08000000
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#define MD_CONTEXT_RISCV64 0x08000000
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#define MD_CONTEXT_RISCV64_INTEGER (MD_CONTEXT_RISCV64 | 0x00000001)
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#define MD_CONTEXT_RISCV64_INTEGER (MD_CONTEXT_RISCV64 | 0x00000001)
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#define MD_CONTEXT_RISCV64_FLOATING_POINT (MD_CONTEXT_RISCV64 | 0x00000004)
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#define MD_CONTEXT_RISCV64_FLOATING_POINT (MD_CONTEXT_RISCV64 | 0x00000002)
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#define MD_CONTEXT_RISCV64_FULL (MD_CONTEXT_RISCV64_INTEGER | \
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#define MD_CONTEXT_RISCV64_FULL (MD_CONTEXT_RISCV64_INTEGER | \
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MD_CONTEXT_RISCV64_FLOATING_POINT)
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MD_CONTEXT_RISCV64_FLOATING_POINT)
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typedef struct {
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typedef struct {
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/* Determines which fields of this struct are populated */
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/* Determines which fields of this struct are populated */
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uint32_t context_flags;
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uint32_t context_flags;
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uint32_t version;
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uint64_t pc;
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uint64_t pc;
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uint64_t ra;
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uint64_t ra;
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@ -161,7 +146,10 @@ typedef struct {
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uint64_t t5;
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uint64_t t5;
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uint64_t t6;
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uint64_t t6;
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MDFloatingSaveAreaRISCV float_save;
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/* 32 floating point registers, f0 .. f31. Breakpad only supports RISCV64 with
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* 64 bit floating point. */
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uint64_t fpregs[MD_CONTEXT_RISCV_FPR_COUNT];
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uint32_t fcsr;
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} MDRawContextRISCV64;
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} MDRawContextRISCV64;
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@ -776,24 +776,14 @@ void DumpContext::Print() {
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context_riscv->t6);
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context_riscv->t6);
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#if defined(__riscv)
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#if defined(__riscv)
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for (unsigned int freg_index = 0;
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for (unsigned int freg_index = 0; freg_index < MD_CONTEXT_RISCV_FPR_COUNT;
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freg_index < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; ++freg_index) {
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++freg_index) {
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riscv_fpr_size fp_value = context_riscv->float_save.regs[freg_index];
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// Breakpad only supports RISCV32 with 32 bit floating point.
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# if __riscv_flen == 32
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uint32_t fp_value = context_riscv->fpregs[freg_index];
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printf(" float_save.regs[%2d] = 0x%" PRIx32 "\n",
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printf(" fpregs[%2d] = 0x%" PRIx32 "\n", freg_index,
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freg_index, fp_value);
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fp_value);
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# elif __riscv_flen == 64
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printf(" float_save.regs[%2d] = 0x%" PRIx64 "\n",
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freg_index, fp_value);
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# elif __riscv_flen == 128
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printf(" float_save.regs[%2d] = 0x%" PRIx64 "%" PRIx64 "\n",
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freg_index, fp_value.high, fp_value.low);
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# else
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# error "Unexpected __riscv_flen"
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# endif
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}
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}
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printf(" float_save.fpcsr = 0x%" PRIx32 "\n",
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printf(" fcsr = 0x%" PRIx32 "\n", context_riscv->fcsr);
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context_riscv->float_save.fpcsr);
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#endif
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#endif
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break;
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break;
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}
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}
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@ -870,25 +860,14 @@ void DumpContext::Print() {
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context_riscv64->t6);
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context_riscv64->t6);
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#if defined(__riscv)
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#if defined(__riscv)
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for (unsigned int freg_index = 0;
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for (unsigned int freg_index = 0; freg_index < MD_CONTEXT_RISCV_FPR_COUNT;
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freg_index < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; ++freg_index) {
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++freg_index) {
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riscv_fpr_size fp_value = context_riscv64->float_save.regs[freg_index];
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// Breakpad only supports RISCV64 with 64 bit floating point.
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# if __riscv_flen == 32
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uint64_t fp_value = context_riscv64->fpregs[freg_index];
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printf(" float_save.regs[%2d] = 0x%" PRIx32 "\n",
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printf(" fpregs[%2d] = 0x%" PRIx64 "\n", freg_index,
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freg_index, fp_value);
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fp_value);
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# elif __riscv_flen == 64
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printf(" float_save.regs[%2d] = 0x%" PRIx64 "\n",
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freg_index, fp_value);
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# elif __riscv_flen == 128
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printf(" float_save.regs[%2d] = 0x%"
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PRIx64 "%" PRIx64 "\n",
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freg_index, fp_value.high, fp_value.low);
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# else
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# error "Unexpected __riscv_flen"
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# endif
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}
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}
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printf(" float_save.fpcsr = 0x%" PRIx32 "\n",
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printf(" fcsr = 0x%" PRIx32 "\n", context_riscv64->fcsr);
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context_riscv64->float_save.fpcsr);
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#endif
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#endif
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break;
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break;
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}
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}
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@ -1259,12 +1259,11 @@ bool MinidumpContext::Read(uint32_t expected_size) {
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Swap(&context_riscv->t5);
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Swap(&context_riscv->t5);
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Swap(&context_riscv->t6);
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Swap(&context_riscv->t6);
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for (int fpr_index = 0;
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for (int fpr_index = 0; fpr_index < MD_CONTEXT_RISCV_FPR_COUNT;
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fpr_index < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT;
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++fpr_index) {
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++fpr_index) {
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Swap(&context_riscv->float_save.regs[fpr_index]);
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Swap(&context_riscv->fpregs[fpr_index]);
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}
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}
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Swap(&context_riscv->float_save.fpcsr);
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Swap(&context_riscv->fcsr);
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}
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}
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SetContextRISCV(context_riscv.release());
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SetContextRISCV(context_riscv.release());
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@ -1338,12 +1337,11 @@ bool MinidumpContext::Read(uint32_t expected_size) {
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Swap(&context_riscv64->t5);
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Swap(&context_riscv64->t5);
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Swap(&context_riscv64->t6);
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Swap(&context_riscv64->t6);
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for (int fpr_index = 0;
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for (int fpr_index = 0; fpr_index < MD_CONTEXT_RISCV_FPR_COUNT;
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fpr_index < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT;
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++fpr_index) {
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++fpr_index) {
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Swap(&context_riscv64->float_save.regs[fpr_index]);
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Swap(&context_riscv64->fpregs[fpr_index]);
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}
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}
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Swap(&context_riscv64->float_save.fpcsr);
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Swap(&context_riscv64->fcsr);
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}
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}
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SetContextRISCV64(context_riscv64.release());
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SetContextRISCV64(context_riscv64.release());
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@ -583,25 +583,21 @@ ParseThreadRegisters(CrashedProcess::Thread* thread,
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thread->mcontext.__gregs[30] = rawregs->t5;
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thread->mcontext.__gregs[30] = rawregs->t5;
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thread->mcontext.__gregs[31] = rawregs->t6;
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thread->mcontext.__gregs[31] = rawregs->t6;
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# if __riscv_flen == 32
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// Breakpad only supports RISCV32 with 32 bit floating point.
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for (int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; ++i) {
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// Breakpad only supports RISCV64 with 64 bit floating point.
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thread->mcontext.__fpregs.__f.__f[i] = rawregs->float_save.regs[i];
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#if __riscv_xlen == 32
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for (int i = 0; i < MD_CONTEXT_RISCV_FPR_COUNT; ++i) {
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thread->mcontext.__fpregs.__f.__f[i] = rawregs->fpregs[i];
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}
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}
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thread->mcontext.__fpregs.__f.__fcsr = rawregs->float_save.fpcsr;
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thread->mcontext.__fpregs.__f.__fcsr = rawregs->fcsr;
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# elif __riscv_flen == 64
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#elif __riscv_xlen == 64
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for (int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; ++i) {
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for (int i = 0; i < MD_CONTEXT_RISCV_FPR_COUNT; ++i) {
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thread->mcontext.__fpregs.__d.__f[i] = rawregs->float_save.regs[i];
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thread->mcontext.__fpregs.__d.__f[i] = rawregs->fpregs[i];
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}
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}
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thread->mcontext.__fpregs.__d.__fcsr = rawregs->float_save.fpcsr;
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thread->mcontext.__fpregs.__d.__fcsr = rawregs->fcsr;
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# elif __riscv_flen == 128
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#else
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for (int i = 0; i < MD_FLOATINGSAVEAREA_RISCV_FPR_COUNT; ++i) {
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#error "Unexpected __riscv_xlen"
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thread->mcontext.__fpregs.__q.__f[2*i] = rawregs->float_save.regs[i].high;
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#endif
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thread->mcontext.__fpregs.__q.__f[2*i+1] = rawregs->float_save.regs[i].low;
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}
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thread->mcontext.__fpregs.__q.__fcsr = rawregs->float_save.fpcsr;
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# else
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# error "Unexpected __riscv_flen"
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# endif
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}
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}
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#else
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#else
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#error "This code has not been ported to your platform yet"
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#error "This code has not been ported to your platform yet"
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