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Adding mips support for Android.
Mips linux support has been added previously in r1212. Some additional changes are required to make breakpad functional on Android. BUG=none TEST=build, unittests, chrome test application Review URL: https://breakpad.appspot.com/632002 git-svn-id: http://google-breakpad.googlecode.com/svn/trunk@1215 4c0a9323-5329-0410-9bdc-e9ce6186880e
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@ -76,7 +76,12 @@ void FlushInstructionCache(const char* memory, uint32_t memory_size) {
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# error "Your operating system is not supported yet"
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# endif
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#elif defined(__mips__)
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# if defined(__linux__)
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# if defined(__ANDROID__)
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// Provided by Android's <unistd.h>
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long begin = reinterpret_cast<long>(memory);
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long end = begin + static_cast<long>(memory_size);
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cacheflush(begin, end, 0);
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# elif defined(__linux__)
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// See http://www.linux-mips.org/wiki/Cacheflush_Syscall.
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cacheflush(const_cast<char*>(memory), memory_size, ICACHE);
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# else
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@ -429,7 +429,11 @@ static void CPUFillFromUContext(MDRawContextMIPS* out, const ucontext* uc,
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out->cause = 0; // Not reported in signal context.
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for (int i = 0; i < MD_FLOATINGSAVEAREA_MIPS_FPR_COUNT; ++i)
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#if defined (__ANDROID__)
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out->float_save.regs[i] = uc->uc_mcontext.fpregs[i];
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#else
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out->float_save.regs[i] = uc->uc_mcontext.fpregs.fp_r.fp_dregs[i];
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#endif
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out->float_save.fpcsr = uc->uc_mcontext.fpc_csr;
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out->float_save.fir = uc->uc_mcontext.fpc_eir; // Unused.
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@ -140,6 +140,85 @@ breakpad_getcontext:
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.size breakpad_getcontext, . - breakpad_getcontext
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#elif defined(__mips__)
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#if _MIPS_SIM != _ABIO32
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#error "Unsupported mips ISA. Only mips o32 is supported."
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#endif
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// This implementation is inspired by implementation of getcontext in glibc.
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#include <asm/asm.h>
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#include <asm/regdef.h>
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#include <asm/fpregdef.h>
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#include <asm/unistd.h> // for __NR_rt_sigprocmask
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#define _NSIG8 128 / 8
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#define SIG_BLOCK 1
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.text
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LOCALS_NUM = 2 // save gp and ra on stack
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FRAME_SIZE = ((LOCALS_NUM * SZREG) + ALSZ) & ALMASK
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RA_FRAME_OFFSET = FRAME_SIZE - (1 * SZREG)
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GP_FRAME_OFFSET = FRAME_SIZE - (2 * SZREG)
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MCONTEXT_REG_SIZE = 8
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NESTED (breakpad_getcontext, FRAME_SIZE, ra)
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.mask 0x00000000, 0
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.fmask 0x00000000, 0
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.set noreorder
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.cpload t9
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.set reorder
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move a2, sp
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#define _SP a2
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addiu sp, -FRAME_SIZE
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sw ra, RA_FRAME_OFFSET(sp)
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sw gp, GP_FRAME_OFFSET(sp)
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sw s0, (16 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s1, (17 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s2, (18 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s3, (19 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s4, (20 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s5, (21 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s6, (22 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw s7, (23 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw _SP, (29 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw fp, (30 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw ra, (31 * MCONTEXT_REG_SIZE + MCONTEXT_GREGS_OFFSET)(a0)
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sw ra, MCONTEXT_PC_OFFSET(a0)
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#ifdef __mips_hard_float
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s.d fs0, (20 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
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s.d fs1, (22 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
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s.d fs2, (24 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
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s.d fs3, (26 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
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s.d fs4, (28 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
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s.d fs5, (30 * MCONTEXT_REG_SIZE + MCONTEXT_FPREGS_OFFSET)(a0)
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cfc1 v1, fcr31
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sw v1, MCONTEXT_FPC_CSR(a0)
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#endif // __mips_hard_float
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/* rt_sigprocmask (SIG_BLOCK, NULL, &ucp->uc_sigmask, _NSIG8) */
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li a3, _NSIG8
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addu a2, a0, UCONTEXT_SIGMASK_OFFSET
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move a1, zero
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li a0, SIG_BLOCK
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li v0, __NR_rt_sigprocmask
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syscall
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lw ra, RA_FRAME_OFFSET(sp)
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lw gp, GP_FRAME_OFFSET(sp)
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addiu sp, FRAME_SIZE
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jr ra
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END (breakpad_getcontext)
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#else
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#error "This file has not been ported for your CPU!"
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#endif
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@ -69,6 +69,19 @@ TEST(AndroidUContext, GRegsOffset) {
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ASSERT_EQ(static_cast<size_t>(UCONTEXT_FPREGS_MEM_OFFSET),
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offsetof(ucontext_t,__fpregs_mem));
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#elif defined(__mips__)
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ASSERT_EQ(static_cast<size_t>(MCONTEXT_GREGS_OFFSET),
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offsetof(ucontext_t,uc_mcontext.gregs));
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// PC for mips is not part of gregs.
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ASSERT_EQ(static_cast<size_t>(MCONTEXT_PC_OFFSET),
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offsetof(ucontext_t,uc_mcontext.pc));
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ASSERT_EQ(static_cast<size_t>(MCONTEXT_FPREGS_OFFSET),
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offsetof(ucontext_t,uc_mcontext.fpregs));
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ASSERT_EQ(static_cast<size_t>(MCONTEXT_FPC_CSR),
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offsetof(ucontext_t,uc_mcontext.fpc_csr));
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#else
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ASSERT_EQ(static_cast<size_t>(MCONTEXT_GREGS_OFFSET),
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offsetof(ucontext_t,uc_mcontext.gregs));
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@ -128,7 +128,6 @@ typedef struct ucontext {
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#elif defined(__mips__)
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// Not supported by Google Breakpad at this point, but just in case.
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typedef struct {
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uint32_t regmask;
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uint32_t status;
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@ -120,8 +120,23 @@ struct user {
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#elif defined(__mips__)
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// TODO: Provide some useful definitions here, once the rest of Breakpad
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// requires them.
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#define _ASM_USER_H 1 // Prevent <asm/user.h> conflicts
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struct user_regs_struct {
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unsigned long long regs[32];
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unsigned long long lo;
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unsigned long long hi;
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unsigned long long epc;
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unsigned long long badvaddr;
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unsigned long long status;
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unsigned long long cause;
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};
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struct user_fpregs_struct {
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unsigned long long regs[32];
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unsigned int fpcsr;
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unsigned int fir;
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};
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#else
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# error "Unsupported Android CPU ABI"
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@ -75,8 +75,11 @@
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#elif defined(__mips__)
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#define MCONTEXT_GREGS_OFFSET 0
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#define UCONTEXT_SIGMASK_OFFSET 0
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#define MCONTEXT_PC_OFFSET 32
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#define MCONTEXT_GREGS_OFFSET 40
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#define MCONTEXT_FPREGS_OFFSET 296
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#define MCONTEXT_FPC_CSR 556
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#define UCONTEXT_SIGMASK_OFFSET 616
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#else
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#error "This header has not been ported for your CPU"
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@ -617,7 +617,7 @@ bool LoadSymbols(const string& obj_file,
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// Linux C++ exception handling information can also provide
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// unwinding data.
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const Shdr* eh_frame_section =
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FindElfSectionByName<ElfClass>(".eh_frame", debug_section_type,
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FindElfSectionByName<ElfClass>(".eh_frame", SHT_PROGBITS,
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sections, names, names_end,
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elf_header->e_shnum);
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if (eh_frame_section) {
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@ -66,7 +66,7 @@
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#ifndef GOOGLE_BREAKPAD_COMMON_MINIDUMP_CPU_MIPS_H__
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#define GOOGLE_BREAKPAD_COMMON_MINIDUMP_CPU_MIPS_H__
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#ifdef __mips__
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#if defined(__mips__) && !defined(__ANDROID__)
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typedef struct {
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uint64_t regs[32];
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uint64_t lo;
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