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Use GCC extended assembler
Naked functions and basic assembler don't seem to work reliably - basic assembler is assumed to not change registers or memory, and there does not appear to be any special handling of naked functions in this regard. Signed-off-by: Kevin Bracey <kevin.bracey@arm.com>
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@ -598,18 +598,15 @@ static __asm void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t r[3])
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BX lr
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BX lr
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#endif
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#endif
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}
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}
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#elif defined MBEDTLS_HAVE_ASM && (defined __GNUC__ || defined __clang__) && defined __arm__
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#elif defined MBEDTLS_HAVE_ASM && defined __GNUC__ && defined __arm__
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static __attribute__((__naked__))
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static void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t r[3])
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void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t r[3])
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{
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{
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asm(
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register uECC_word_t r0 asm ("r0") = a;
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register uECC_word_t r1 asm ("r1") = b;
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register uECC_word_t *r2 asm ("r2") = r;
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asm volatile (
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#if defined __thumb__ && !defined(__thumb2__)
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#if defined __thumb__ && !defined(__thumb2__)
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".syntax unified \n\t"
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".syntax unified \n\t"
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"PUSH {r4-r5} \n\t"
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".cfi_remember_state \n\t"
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".cfi_adjust_cfa_offset 8 \n\t"
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".cfi_rel_offset r4,0 \n\t"
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".cfi_rel_offset r5,4 \n\t"
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// __ARM_common_mul_uu replacement - inline, faster, don't touch R2
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// __ARM_common_mul_uu replacement - inline, faster, don't touch R2
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// Separate operands into halfwords
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// Separate operands into halfwords
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"UXTH r3,r0 \n\t" // r3 := a.lo
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"UXTH r3,r0 \n\t" // r3 := a.lo
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@ -640,9 +637,9 @@ void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t r[3])
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"ADCS r5,r0 \n\t"
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"ADCS r5,r0 \n\t"
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"SUBS r2,#12 \n\t"
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"SUBS r2,#12 \n\t"
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"STMIA r2!,{r3,r4,r5} \n\t"
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"STMIA r2!,{r3,r4,r5} \n\t"
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"POP {r4-r5} \n\t"
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: "+r" (r0), "+r" (r1), "+r" (r2)
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".cfi_restore_state \n\t"
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:
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"BX lr \n\t"
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: "r3", "r4", "r5", "ip", "cc", "memory"
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#else
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#else
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"UMULL r3,ip,r0,r1 \n\t" // pre-ARMv6 requires Rd[Lo|Hi] != Rn
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"UMULL r3,ip,r0,r1 \n\t" // pre-ARMv6 requires Rd[Lo|Hi] != Rn
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"LDMIA r2,{r0,r1} \n\t"
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"LDMIA r2,{r0,r1} \n\t"
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@ -651,7 +648,9 @@ void muladd(uECC_word_t a, uECC_word_t b, uECC_word_t r[3])
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"ADCS r1,r1,ip \n\t"
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"ADCS r1,r1,ip \n\t"
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"ADC r3,r3,#0 \n\t"
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"ADC r3,r3,#0 \n\t"
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"STMIA r2!,{r0,r1,r3} \n\t"
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"STMIA r2!,{r0,r1,r3} \n\t"
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"BX lr \n\t"
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: "+r" (r0), "+r" (r1), "+r" (r2)
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:
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: "r3", "ip", "cc", "memory"
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#endif
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#endif
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);
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);
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}
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}
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