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https://github.com/yuzu-emu/mbedtls.git
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More GCC assembly
Signed-off-by: Kevin Bracey <kevin.bracey@arm.com>
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parent
06060330d8
commit
4aea62569b
122
tinycrypt/ecc.c
122
tinycrypt/ecc.c
@ -387,6 +387,68 @@ __asm uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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POP {r4-r8,pc}
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#endif
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}
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#elif defined MBEDTLS_HAVE_ASM && defined __GNUC__ && defined __arm__
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uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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{
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#if NUM_ECC_WORDS != 8
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#error adjust ARM assembly to handle NUM_ECC_WORDS != 8
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#endif
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register uECC_word_t *r0 asm ("r0") = result;
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register const uECC_word_t *r1 asm ("r1") = left;
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register const uECC_word_t *r2 asm ("r2") = right;
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asm volatile (
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#if defined __thumb__ && !defined __thumb2__
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".syntax unified \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"SUBS r3,r5 \n\t"
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"SBCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"SBCS r3,r5 \n\t"
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"SBCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"SBCS r3,r5 \n\t"
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"SBCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"SBCS r3,r5 \n\t"
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"SBCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"SBCS r0,r0 \n\t" // r0 := r0 - r0 - borrow = -borrow
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"RSBS r0,r0,#0 \n\t" // r0 := borrow
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: "+r" (r0), "+r" (r1), "+r" (r2)
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:
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: "r3", "r4", "r5", "r6", "cc", "memory"
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#else
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"LDMIA r1!,{r3-r6} \n\t"
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"LDMIA r2!,{r7,r8,r12,lr} \n\t"
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"SUBS r3,r7 \n\t"
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"SBCS r4,r8 \n\t"
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"SBCS r5,r12 \n\t"
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"SBCS r6,lr \n\t"
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"STMIA r0!,{r3-r6} \n\t"
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"LDMIA r1!,{r3-r6} \n\t"
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"LDMIA r2!,{r7,r8,r12,lr} \n\t"
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"SBCS r3,r7 \n\t"
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"SBCS r4,r8 \n\t"
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"SBCS r5,r12 \n\t"
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"SBCS r6,lr \n\t"
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"STMIA r0!,{r3-r6} \n\t"
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"SBCS r0,r0 \n\t" // r0 := r0 - r0 - borrow = -borrow
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"RSBS r0,r0,#0 \n\t" // r0 := borrow
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: "+r" (r0), "+r" (r1), "+r" (r2)
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:
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: "r3", "r4", "r5", "r6", "r7", "r8", "r12", "lr", "cc", "memory"
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#endif
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);
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return (uECC_word_t) r0;
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}
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#else
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uECC_word_t uECC_vli_sub(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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@ -461,6 +523,66 @@ static __asm uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *le
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POP {r4-r8,pc}
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#endif
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}
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#elif defined MBEDTLS_HAVE_ASM && defined __GNUC__ && defined __arm__
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static uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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{
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register uECC_word_t *r0 asm ("r0") = result;
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register const uECC_word_t *r1 asm ("r1") = left;
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register const uECC_word_t *r2 asm ("r2") = right;
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asm volatile (
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#if defined __thumb__ && !defined __thumb2__
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".syntax unified \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"ADDS r3,r5 \n\t"
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"ADCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"ADCS r3,r5 \n\t"
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"ADCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"ADCS r3,r5 \n\t"
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"ADCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"LDMIA r1!,{r3,r4} \n\t"
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"LDMIA r2!,{r5,r6} \n\t"
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"ADCS r3,r5 \n\t"
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"ADCS r4,r6 \n\t"
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"STMIA r0!,{r3,r4} \n\t"
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"MOVS r0,#0 \n\t" // does not affect C flag
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"ADCS r0,r0 \n\t" // r0 := 0 + 0 + C = carry
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: "+r" (r0), "+r" (r1), "+r" (r2)
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:
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: "r3", "r4", "r5", "r6", "cc", "memory"
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#else
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"LDMIA r1!,{r3-r6} \n\t"
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"LDMIA r2!,{r7,r8,r12,lr} \n\t"
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"ADDS r3,r7 \n\t"
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"ADCS r4,r8 \n\t"
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"ADCS r5,r12 \n\t"
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"ADCS r6,lr \n\t"
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"STMIA r0!,{r3-r6} \n\t"
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"LDMIA r1!,{r3-r6} \n\t"
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"LDMIA r2!,{r7,r8,r12,lr} \n\t"
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"ADCS r3,r7 \n\t"
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"ADCS r4,r8 \n\t"
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"ADCS r5,r12 \n\t"
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"ADCS r6,lr \n\t"
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"STMIA r0!,{r3-r6} \n\t"
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"MOVS r0,#0 \n\t" // does not affect C flag
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"ADCS r0,r0 \n\t" // r0 := 0 + 0 + C = carry
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: "+r" (r0), "+r" (r1), "+r" (r2)
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:
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: "r3", "r4", "r5", "r6", "r7", "r8", "r12", "lr", "cc", "memory"
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#endif
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);
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return (uECC_word_t) r0;
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}
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#else
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static uECC_word_t uECC_vli_add(uECC_word_t *result, const uECC_word_t *left,
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const uECC_word_t *right)
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