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https://github.com/yuzu-emu/mbedtls.git
synced 2024-11-22 11:15:43 +01:00
- Moved to more flexible define structure
- Added exception for OpenBSD on Sparc64 (no privilege for call)
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35a7fe52f3
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@ -54,9 +54,11 @@ struct _hr_time
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#endif
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#if defined(POLARSSL_HAVE_ASM) && \
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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(defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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unsigned long tsc;
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@ -64,9 +66,12 @@ unsigned long hardclock( void )
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__asm mov [tsc], eax
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return( tsc );
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}
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#endif
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#else
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#if defined(POLARSSL_HAVE_ASM) && defined(__GNUC__) && defined(__i386__)
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && defined(__i386__)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -74,10 +79,12 @@ unsigned long hardclock( void )
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asm( "rdtsc" : "=a" (lo), "=d" (hi) );
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return( lo );
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}
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#endif
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#else
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#if defined(POLARSSL_HAVE_ASM) && defined(__GNUC__) && \
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(defined(__amd64__) || defined(__x86_64__))
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && (defined(__amd64__) || defined(__x86_64__))
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -85,10 +92,12 @@ unsigned long hardclock( void )
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asm( "rdtsc" : "=a" (lo), "=d" (hi) );
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return( lo | (hi << 32) );
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}
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#endif
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#else
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#if defined(POLARSSL_HAVE_ASM) && defined(__GNUC__) && \
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(defined(__powerpc__) || defined(__ppc__))
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && (defined(__powerpc__) || defined(__ppc__))
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -104,9 +113,29 @@ unsigned long hardclock( void )
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return( tbl );
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}
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#endif
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && defined(__sparc64__)
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#if defined(__OpenBSD__)
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#warning OpenBSD does not allow access to tick register using software version instead
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#else
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#if defined(POLARSSL_HAVE_ASM) && defined(__GNUC__) && defined(__sparc__)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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unsigned long tick;
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asm( "rdpr %%tick, %0;" : "=&r" (tick) );
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return( tick );
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}
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#endif
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#endif
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && defined(__sparc__) && !defined(__sparc64__)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -115,9 +144,12 @@ unsigned long hardclock( void )
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asm( "mov %%g1, %0" : "=r" (tick) );
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return( tick );
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}
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#endif
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#else
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#if defined(POLARSSL_HAVE_ASM) && defined(__GNUC__) && defined(__alpha__)
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && defined(__alpha__)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -125,9 +157,12 @@ unsigned long hardclock( void )
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asm( "rpcc %0" : "=r" (cc) );
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return( cc & 0xFFFFFFFF );
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}
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#endif
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#else
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#if defined(POLARSSL_HAVE_ASM) && defined(__GNUC__) && defined(__ia64__)
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(POLARSSL_HAVE_ASM) && \
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defined(__GNUC__) && defined(__ia64__)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -135,9 +170,11 @@ unsigned long hardclock( void )
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asm( "mov %0 = ar.itc" : "=r" (itc) );
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return( itc );
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}
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#endif
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#else
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#if defined(_MSC_VER)
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#if !defined(POLARSSL_HAVE_HARDCLOCK) && defined(_MSC_VER)
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#define POLARSSL_HAVE_HARDCLOCK
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unsigned long hardclock( void )
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{
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@ -147,8 +184,11 @@ unsigned long hardclock( void )
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return (unsigned long)( offset.QuadPart );
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}
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#endif
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#else
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#if !defined(POLARSSL_HAVE_HARDCLOCK)
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#define POLARSSL_HAVE_HARDCLOCK
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static int hardclock_init = 0;
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static struct timeval tv_init;
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@ -167,15 +207,7 @@ unsigned long hardclock( void )
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return( ( tv_cur.tv_sec - tv_init.tv_sec ) * 1000000
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+ ( tv_cur.tv_usec - tv_init.tv_usec ) );
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}
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#endif /* generic */
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#endif /* WIN32 */
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#endif /* IA-64 */
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#endif /* Alpha */
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#endif /* SPARC8 */
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#endif /* PowerPC */
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#endif /* AMD64 */
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#endif /* i586+ */
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#endif
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volatile int alarmed = 0;
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