yuzu-emu/sirit
1
0
Fork 0
mirror of https://github.com/yuzu-emu/sirit.git synced 2024-11-22 12:05:37 +01:00
Code Issues Packages Projects Releases Wiki Activity

Implemented the rest of the bitwise operations

Browse Source
This commit is contained in:
FernandoS27 2018-11-11 18:51:08 -04:00
parent 6790490271
commit aa3d1adbbd
2 changed files with 78 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
include/sirit/sirit.h
View File

@ -280,10 +280,30 @@ class Module {
/// The least-significant bits will be zero filled.
Id OpShiftLeftLogical(Id result_type, Id base, Id shift);
/// Does a bitwise Or between operands 1 and 2.
Id OpBitwiseOr(Id result_type, Id operand_1, Id operand_2);
/// Does a bitwise Xor between operands 1 and 2.
Id OpBitwiseXor(Id result_type, Id operand_1, Id operand_2);
/// Result is 1 if both Operand 1 and Operand 2 are 1. Result is 0 if either
/// Operand 1 or Operand 2 are 0.
Id OpBitwiseAnd(Id result_type, Id operand_1, Id operand_2);
/// Does a bitwise Not on the operand.
Id OpNot(Id result_type, Id operand);
Id OpBitFieldInsert(Id result_type, Id base, Id insert, Id offset,
Id count);
Id OpBitFieldSExtract(Id result_type, Id base, Id offset, Id count);
Id OpBitFieldUExtract(Id result_type, Id base, Id offset, Id count);
Id OpBitReverse(Id result_type, Id base);
Id OpBitCount(Id result_type, Id base);
// Arithmetic
/// Floating-point subtract of Operand from zero.

57
src/insts/bit.cpp
View File

@ -35,6 +35,20 @@ Id Module::OpShiftLeftLogical(Id result_type, Id base, Id shift) {
return AddCode(std::move(op));
}
Id Module::OpBitwiseOr(Id result_type, Id operand_1, Id operand_2) {
auto op{std::make_unique<Op>(spv::Op::OpBitwiseOr, bound++, result_type)};
op->Add(operand_1);
op->Add(operand_2);
return AddCode(std::move(op));
}
Id Module::OpBitwiseXor(Id result_type, Id operand_1, Id operand_2) {
auto op{std::make_unique<Op>(spv::Op::OpBitwiseXor, bound++, result_type)};
op->Add(operand_1);
op->Add(operand_2);
return AddCode(std::move(op));
}
Id Module::OpBitwiseAnd(Id result_type, Id operand_1, Id operand_2) {
auto op{std::make_unique<Op>(spv::Op::OpBitwiseAnd, bound++, result_type)};
op->Add(operand_1);
@ -42,4 +56,47 @@ Id Module::OpBitwiseAnd(Id result_type, Id operand_1, Id operand_2) {
return AddCode(std::move(op));
}
Id Module::OpNot(Id result_type, Id operand) {
auto op{std::make_unique<Op>(spv::Op::OpNot, bound++, result_type)};
op->Add(operand);
return AddCode(std::move(op));
}
Id Module::OpBitFieldInsert(Id result_type, Id base, Id insert, Id offset, Id count) {
auto op{std::make_unique<Op>(spv::Op::OpBitFieldInsert, bound++, result_type)};
op->Add(base);
op->Add(insert);
op->Add(offset);
op->Add(count);
return AddCode(std::move(op));
}
Id Module::OpBitFieldSExtract(Id result_type, Id base, Id offset, Id count) {
auto op{std::make_unique<Op>(spv::Op::OpBitFieldSExtract, bound++, result_type)};
op->Add(base);
op->Add(offset);
op->Add(count);
return AddCode(std::move(op));
}
Id Module::OpBitFieldUExtract(Id result_type, Id base, Id offset, Id count) {
auto op{std::make_unique<Op>(spv::Op::OpBitFieldUExtract, bound++, result_type)};
op->Add(base);
op->Add(offset);
op->Add(count);
return AddCode(std::move(op));
}
Id Module::OpBitReverse(Id result_type, Id base) {
auto op{std::make_unique<Op>(spv::Op::OpBitReverse, bound++, result_type)};
op->Add(base);
return AddCode(std::move(op));
}
Id Module::OpBitCount(Id result_type, Id base) {
auto op{std::make_unique<Op>(spv::Op::OpBitCount, bound++, result_type)};
op->Add(base);
return AddCode(std::move(op));
}
} // namespace Sirit