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unicorn/qemu/target/arm/Makefile.objs

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target/arm: Makefile cleanup (ARM) Group ARM objects together, TCG related ones at the bottom. This will help when restricting TCG-only objects. Backports commit 07774d584267488c8c2f104ae5b552791961908a from qemu
2019-08-08 20:39:47 +02:00
obj-y += helper.o vfp_helper.o
obj-y += cpu.o
import
2015-08-21 09:04:50 +02:00
obj-$(CONFIG_SOFTMMU) += psci.o
target/arm: Makefile cleanup (Aarch64) Group Aarch64 rules together, TCG related ones at the bottom. This will help when restricting TCG-only objects. Backports commit 87f4f183484dba7a460c59e99dac0dbb9f42ed87 from qemu
2019-08-08 20:31:15 +02:00
obj-$(TARGET_AARCH64) += cpu64.o unicorn_aarch64.o
import
2015-08-21 09:04:50 +02:00
obj-$(TARGET_ARM) += unicorn_arm.o
ARM: Factor out ARM on/off PSCI control functions Split ARM on/off function from PSCI support code. This will allow to reuse these functions in other code. Backports commit 825482adde1f971cbddf27e15fb4453ab3fae994 from qemu
2018-03-02 05:11:30 +01:00
obj-y += arm-powerctl.o
target/arm: Add SVE decode skeleton Including only 4, as-yet unimplemented, instruction patterns so that the whole thing compiles. Backports commit 38388f7ee3adc04a7e7246c04352451c4f8d00fb from qemu
2018-05-20 06:40:16 +02:00
DECODETREE = $(SRC_PATH)/scripts/decodetree.py
target/arm/decode-sve.inc.c: $(SRC_PATH)/target/arm/sve.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --decode disas_sve -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm: Add stubs for AArch32 VFP decodetree Add the infrastructure for building and invoking a decodetree decoder for the AArch32 VFP encodings. At the moment the new decoder covers nothing, so we always fall back to the existing hand-written decode. We need to have one decoder for the unconditional insns and one for the conditional insns, as otherwise the patterns for conditional insns would incorrectly match against the unconditional ones too. Since translate.c is over 14,000 lines long and we're going to be touching pretty much every line of the VFP code as part of the decodetree conversion, we create a new translate-vfp.inc.c to hold the code which deals with VFP in the new scheme. It should be possible to convert this into a standalone translation unit eventually, but the conversion process will be much simpler if we simply #include it midway through translate.c to start with. Backports commit 78e138bc1f672c145ef6ace74617db00eebaa2ba from qemu
2019-06-13 22:24:24 +02:00
target/arm/decode-vfp.inc.c: $(SRC_PATH)/target/arm/vfp.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_vfp -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm/decode-vfp-uncond.inc.c: $(SRC_PATH)/target/arm/vfp-uncond.decode $(DECODETREE)
$(call quiet-command,\
$(PYTHON) $(DECODETREE) --static-decode disas_vfp_uncond -o $@ $<,\
"GEN", $(TARGET_DIR)$@)
target/arm: Add SVE decode skeleton Including only 4, as-yet unimplemented, instruction patterns so that the whole thing compiles. Backports commit 38388f7ee3adc04a7e7246c04352451c4f8d00fb from qemu
2018-05-20 06:40:16 +02:00
target/arm/translate-sve.o: target/arm/decode-sve.inc.c
target/arm: Add stubs for AArch32 VFP decodetree Add the infrastructure for building and invoking a decodetree decoder for the AArch32 VFP encodings. At the moment the new decoder covers nothing, so we always fall back to the existing hand-written decode. We need to have one decoder for the unconditional insns and one for the conditional insns, as otherwise the patterns for conditional insns would incorrectly match against the unconditional ones too. Since translate.c is over 14,000 lines long and we're going to be touching pretty much every line of the VFP code as part of the decodetree conversion, we create a new translate-vfp.inc.c to hold the code which deals with VFP in the new scheme. It should be possible to convert this into a standalone translation unit eventually, but the conversion process will be much simpler if we simply #include it midway through translate.c to start with. Backports commit 78e138bc1f672c145ef6ace74617db00eebaa2ba from qemu
2019-06-13 22:24:24 +02:00
target/arm/translate.o: target/arm/decode-vfp.inc.c
target/arm/translate.o: target/arm/decode-vfp-uncond.inc.c
target/arm: Makefile cleanup (ARM) Group ARM objects together, TCG related ones at the bottom. This will help when restricting TCG-only objects. Backports commit 07774d584267488c8c2f104ae5b552791961908a from qemu
2019-08-08 20:39:47 +02:00
obj-y += translate.o op_helper.o
obj-y += crypto_helper.o
obj-y += iwmmxt_helper.o vec_helper.o neon_helper.o
target/arm: Makefile cleanup (Aarch64) Group Aarch64 rules together, TCG related ones at the bottom. This will help when restricting TCG-only objects. Backports commit 87f4f183484dba7a460c59e99dac0dbb9f42ed87 from qemu
2019-08-08 20:31:15 +02:00
obj-$(TARGET_AARCH64) += translate-a64.o helper-a64.o
target/arm: Implement SVE predicate test
2018-05-20 07:04:15 +02:00
obj-$(TARGET_AARCH64) += translate-sve.o sve_helper.o
target/arm: Makefile cleanup (Aarch64) Group Aarch64 rules together, TCG related ones at the bottom. This will help when restricting TCG-only objects. Backports commit 87f4f183484dba7a460c59e99dac0dbb9f42ed87 from qemu
2019-08-08 20:31:15 +02:00
obj-$(TARGET_AARCH64) += pauth_helper.o
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