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unicorn/qemu/default-configs/riscv32-softmmu.mak

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target/riscv: Initial introduction of the RISC-V target This ports over the RISC-V architecture from Qemu. This is currently a very barebones transition. No code hooking or any fancy stuff. Currently, you can feed it instructions and query the CPU state itself. This also allows choosing whether or not RISC-V 32-bit or RISC-V 64-bit is desirable through Unicorn's interface as well. Extremely basic examples of executing a single instruction have been added to the samples directory to help demonstrate how to use the basic functionality.
2019-03-08 19:06:28 +01:00
# Default configuration for riscv32-softmmu
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