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target/arm: Fix aa64 FCADD and FCMLA decode

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These insns require u=1; failed to include that in the switch
cases. This probably happened during one of the rebases just
before final commit.

Fixes: d17b7cdcf4e

Backports commit b8a4a96db3639e17ab5e5cdc14fca4b19fbf5b3b from qemu
This commit is contained in:
Richard Henderson 2018-08-17 14:06:00 -04:00 committed by Lioncash
parent c387d51c1d
commit 0136ca773f
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 6 additions and 6 deletions
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12
qemu/target/arm/translate-a64.c
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@ -11578,12 +11578,12 @@ static void disas_simd_three_reg_same_extra(DisasContext *s, uint32_t insn)
}
feature = ARM_FEATURE_V8_DOTPROD;
break;
case 0x8: /* FCMLA, #0 */
case 0x9: /* FCMLA, #90 */
case 0xa: /* FCMLA, #180 */
case 0xb: /* FCMLA, #270 */
case 0xc: /* FCADD, #90 */
case 0xe: /* FCADD, #270 */
case 0x18: /* FCMLA, #0 */
case 0x19: /* FCMLA, #90 */
case 0x1a: /* FCMLA, #180 */
case 0x1b: /* FCMLA, #270 */
case 0x1c: /* FCADD, #90 */
case 0x1e: /* FCADD, #270 */
if (size == 0
|| (size == 1 && !arm_dc_feature(s, ARM_FEATURE_V8_FP16))
|| (size == 3 && !is_q)) {