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target-mips: check CP0 enabled for CACHE instruction also in R6
Backports commit 40d48212f934d4deab40ffe84a0f9c4c553d4742 from qemu
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@ -17322,6 +17322,7 @@ static void decode_opc_special3_r6(CPUMIPSState *env, DisasContext *ctx)
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/* Treat as NOP. */
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break;
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case R6_OPC_CACHE:
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check_cp0_enabled(ctx);
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/* Treat as NOP. */
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break;
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case R6_OPC_SC:
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