diff --git a/qemu/target/arm/translate-a64.c b/qemu/target/arm/translate-a64.c
index 65430f85..e57ede20 100644
--- a/qemu/target/arm/translate-a64.c
+++ b/qemu/target/arm/translate-a64.c
@@ -13901,6 +13901,8 @@ static void disas_crypto_three_reg_sha512(DisasContext *s, uint32_t insn)
             feature = dc_isar_feature(aa64_sha3, s);
             genfn = NULL;
             break;
+        default:
+            g_assert_not_reached();
         }
     } else {
         switch (opcode) {
diff --git a/qemu/target/i386/cpu.c b/qemu/target/i386/cpu.c
index 47f99a9c..b54cd308 100644
--- a/qemu/target/i386/cpu.c
+++ b/qemu/target/i386/cpu.c
@@ -1460,10 +1460,10 @@ static int altcmp(const char *s, const char *e, const char *altstr)
 /* search featureset for flag *[s..e), if found set corresponding bit in
  * *pval and return true, otherwise return false
  */
-static bool lookup_feature(uint32_t *pval, const char *s, const char *e,
+static bool lookup_feature(uint64_t *pval, const char *s, const char *e,
                            const char **featureset)
 {
-    uint32_t mask;
+    uint64_t mask;
     const char **ppc;
     bool found = false;
 
diff --git a/qemu/target/i386/cpu.h b/qemu/target/i386/cpu.h
index 64207d49..6d2758cc 100644
--- a/qemu/target/i386/cpu.h
+++ b/qemu/target/i386/cpu.h
@@ -492,7 +492,7 @@ typedef enum FeatureWord {
     FEATURE_WORDS,
 } FeatureWord;
 
-typedef uint32_t FeatureWordArray[FEATURE_WORDS];
+typedef uint64_t FeatureWordArray[FEATURE_WORDS];
 
 /* cpuid_features bits */
 #define CPUID_FP87 (1U << 0)