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tcg: Make cpu_PC a TCGv

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Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
This commit is contained in:
Lioncash 2018-02-21 00:47:07 -05:00
parent 372e3307c5
commit 1defc70341
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GPG Key ID: 4E3C3CC1031BA9C7
3 changed files with 3 additions and 5 deletions
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4
qemu/target-mips/translate.c
View File

@ -20090,9 +20090,7 @@ void mips_tcg_init(struct uc_struct *uc)
tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env, off, msaregnames[i * 2 + 1]);
}
if (!uc->init_tcg)
tcg_ctx->cpu_PC = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_PC) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
tcg_ctx->cpu_PC = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_tc.PC), "PC");
for (i = 0; i < MIPS_DSP_ACC; i++) {

1
qemu/target-mips/unicorn.c
View File

@ -57,7 +57,6 @@ void mips_release(void *ctx)
g_free(tcg_ctx->cpu_gpr[i]);
}
g_free(tcg_ctx->cpu_PC);
g_free(tcg_ctx->tb_ctx.tbs);
}

3
qemu/tcg/tcg.h
View File

@ -812,7 +812,8 @@ struct TCGContext {
/* qemu/target-mips/translate.c */
/* global register indices */
void *cpu_gpr[32], *cpu_PC;
void *cpu_gpr[32];
TCGv cpu_PC;
TCGv cpu_HI[4], cpu_LO[4]; // MIPS_DSP_ACC = 4 in qemu/target-mips/cpu.h
TCGv cpu_dspctrl;
TCGv btarget;