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m68k: fix usp processing on interrupt entry and exception exit

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The action to potentially switch sp register is not occurring at the correct
point in the interrupt entry or exception exit sequences.

For the interrupt entry case the sp on entry is used to create the stack
exception frame - but this may well be the user stack pointer, since we
haven't done the switch yet. Re-order the flow to switch the sp regs then
use the current sp to create the exception frame.

For the return from exception case the code is unwinding the sp after
switching sp registers. But it should always unwind the supervisor sp
first, then carry out any required sp switch.

Note that these problems don't effect operation unless the user sp bit is
set in the CACR register. Only a single sp is used in the default power up
state. Previously Linux only used this single sp mode. But modern versions
of Linux use the user sp mode now, so we need correct behavior for Linux
to work.

Backports commit 0c8ff723bd29e5c8b2ca989f857ae5c37ec49c4e from qemu
This commit is contained in:
Greg Ungerer 2018-02-13 17:08:08 -05:00 committed by Lioncash
parent 0a0383e2b5
commit 1f6f6b2863
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 3 additions and 4 deletions
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7
qemu/target-m68k/op_helper.c
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@ -63,8 +63,8 @@ static void do_rte(CPUM68KState *env)
env->pc = cpu_ldl_kernel(env, sp + 4);
sp |= (fmt >> 28) & 3;
env->sr = fmt & 0xffff;
m68k_switch_sp(env);
env->aregs[7] = sp + 8;
m68k_switch_sp(env);
}
static void do_interrupt_all(CPUM68KState *env, int is_hw)
@ -99,10 +99,7 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
vector = cs->exception_index << 2;
sp = env->aregs[7];
fmt |= 0x40000000;
fmt |= (sp & 3) << 28;
fmt |= vector << 16;
fmt |= env->sr;
@ -112,6 +109,8 @@ static void do_interrupt_all(CPUM68KState *env, int is_hw)
env->sr &= ~SR_M;
}
m68k_switch_sp(env);
sp = env->aregs[7];
fmt |= (sp & 3) << 28;
/* ??? This could cause MMU faults. */
sp &= ~3;