From 221232fb359de096b68e1ae7c2fdfb7add4ef87b Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Sun, 4 Mar 2018 21:14:04 -0500 Subject: [PATCH] target/arm: Move regime_is_secure() to target/arm/internals.h Move the regime_is_secure() utility function to internals.h; we are going to want to call it from translate.c. Backports commit 61fcd69b0db268e7612b07fadc436b93def91768 from qemu --- qemu/target/arm/helper.c | 27 --------------------------- qemu/target/arm/internals.h | 26 ++++++++++++++++++++++++++ 2 files changed, 26 insertions(+), 27 deletions(-) diff --git a/qemu/target/arm/helper.c b/qemu/target/arm/helper.c index 88dd672d..b2da6ad9 100644 --- a/qemu/target/arm/helper.c +++ b/qemu/target/arm/helper.c @@ -6328,33 +6328,6 @@ static inline uint32_t regime_el(CPUARMState *env, ARMMMUIdx mmu_idx) } } - -/* Return true if this address translation regime is secure */ -static inline bool regime_is_secure(CPUARMState *env, ARMMMUIdx mmu_idx) -{ - switch (mmu_idx) { - case ARMMMUIdx_S12NSE0: - case ARMMMUIdx_S12NSE1: - case ARMMMUIdx_S1NSE0: - case ARMMMUIdx_S1NSE1: - case ARMMMUIdx_S1E2: - case ARMMMUIdx_S2NS: - case ARMMMUIdx_MPriv: - case ARMMMUIdx_MNegPri: - case ARMMMUIdx_MUser: - return false; - case ARMMMUIdx_S1E3: - case ARMMMUIdx_S1SE0: - case ARMMMUIdx_S1SE1: - case ARMMMUIdx_MSPriv: - case ARMMMUIdx_MSNegPri: - case ARMMMUIdx_MSUser: - return true; - default: - g_assert_not_reached(); - } -} - /* Return the SCTLR value which controls this address translation regime */ static inline uint32_t regime_sctlr(CPUARMState *env, ARMMMUIdx mmu_idx) { diff --git a/qemu/target/arm/internals.h b/qemu/target/arm/internals.h index 3da5473c..e1743a02 100644 --- a/qemu/target/arm/internals.h +++ b/qemu/target/arm/internals.h @@ -482,4 +482,30 @@ static inline void arm_call_el_change_hook(ARMCPU *cpu) } } +/* Return true if this address translation regime is secure */ +static inline bool regime_is_secure(CPUARMState *env, ARMMMUIdx mmu_idx) +{ + switch (mmu_idx) { + case ARMMMUIdx_S12NSE0: + case ARMMMUIdx_S12NSE1: + case ARMMMUIdx_S1NSE0: + case ARMMMUIdx_S1NSE1: + case ARMMMUIdx_S1E2: + case ARMMMUIdx_S2NS: + case ARMMMUIdx_MPriv: + case ARMMMUIdx_MNegPri: + case ARMMMUIdx_MUser: + return false; + case ARMMMUIdx_S1E3: + case ARMMMUIdx_S1SE0: + case ARMMMUIdx_S1SE1: + case ARMMMUIdx_MSPriv: + case ARMMMUIdx_MSNegPri: + case ARMMMUIdx_MSUser: + return true; + default: + g_assert_not_reached(); + } +} + #endif