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target-arm: remove EXCP_STREX + cpu_exclusive_{test, info}

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The exception is not emitted anymore; remove it and the associated
TCG variables.

Backports commit 05188cc72f0399e99c92f608a8e7ca4c8e552c4b from qemu
This commit is contained in:
Emilio G. Cota 2018-02-28 00:24:13 -05:00 committed by Lioncash
parent cb92eea81a
commit 22be035e60
No known key found for this signature in database
GPG Key ID: 4E3C3CC1031BA9C7
3 changed files with 2 additions and 20 deletions
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5
qemu/target-arm/cpu.h
View File

@ -50,7 +50,6 @@
#define EXCP_BKPT 7 #define EXCP_BKPT 7
#define EXCP_EXCEPTION_EXIT 8 /* Return from v7M exception. */ #define EXCP_EXCEPTION_EXIT 8 /* Return from v7M exception. */
#define EXCP_KERNEL_TRAP 9 /* Jumped to kernel code page. */ #define EXCP_KERNEL_TRAP 9 /* Jumped to kernel code page. */
#define EXCP_STREX 10
#define EXCP_HVC 11 /* HyperVisor Call */ #define EXCP_HVC 11 /* HyperVisor Call */
#define EXCP_HYP_TRAP 12 #define EXCP_HYP_TRAP 12
#define EXCP_SMC 13 /* Secure Monitor Call */ #define EXCP_SMC 13 /* Secure Monitor Call */
@ -482,10 +481,6 @@ typedef struct CPUARMState {
uint64_t exclusive_addr; uint64_t exclusive_addr;
uint64_t exclusive_val; uint64_t exclusive_val;
uint64_t exclusive_high; uint64_t exclusive_high;
#if defined(CONFIG_USER_ONLY)
uint64_t exclusive_test;
uint32_t exclusive_info;
#endif
/* iwMMXt coprocessor state. */ /* iwMMXt coprocessor state. */
struct { struct {

5
qemu/target-arm/internals.h
View File

@ -46,8 +46,7 @@ static inline bool excp_is_internal(int excp)
|| excp == EXCP_HALTED || excp == EXCP_HALTED
|| excp == EXCP_EXCEPTION_EXIT || excp == EXCP_EXCEPTION_EXIT
|| excp == EXCP_KERNEL_TRAP || excp == EXCP_KERNEL_TRAP
|| excp == EXCP_SEMIHOST || excp == EXCP_SEMIHOST;
|| excp == EXCP_STREX;
} }
/* Exception names for debug logging; note that not all of these /* Exception names for debug logging; note that not all of these
@ -64,7 +63,7 @@ static const char * const excnames[] = {
"Breakpoint", "Breakpoint",
"QEMU v7M exception exit", "QEMU v7M exception exit",
"QEMU intercept of kernel commpage", "QEMU intercept of kernel commpage",
"QEMU intercept of STREX", NULL,
"Hypervisor Call", "Hypervisor Call",
"Hypervisor Trap", "Hypervisor Trap",
"Secure Monitor Call", "Secure Monitor Call",

12
qemu/target-arm/translate.c
View File

@ -57,12 +57,6 @@
#define IS_USER(s) (s->user) #define IS_USER(s) (s->user)
#endif #endif
#ifdef CONFIG_USER_ONLY
static TCGv_i64 cpu_exclusive_test;
static TCGv_i32 cpu_exclusive_info;
#endif
static const char *regnames[] = static const char *regnames[] =
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "pc" }; "r8", "r9", "r10", "r11", "r12", "r13", "r14", "pc" };
@ -90,12 +84,6 @@ void arm_translate_init(struct uc_struct *uc)
offsetof(CPUARMState, exclusive_addr), "exclusive_addr"); offsetof(CPUARMState, exclusive_addr), "exclusive_addr");
tcg_ctx->cpu_exclusive_val = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env, tcg_ctx->cpu_exclusive_val = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_val), "exclusive_val"); offsetof(CPUARMState, exclusive_val), "exclusive_val");
#ifdef CONFIG_USER_ONLY
cpu_exclusive_test = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_test), "exclusive_test");
cpu_exclusive_info = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_info), "exclusive_info");
#endif
a64_translate_init(uc); a64_translate_init(uc);
} }