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target/riscv: Add Hypervisor CSR macros

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Add the 1.10.1 Hypervisor CSRs and remove the 1.9.1 spec versions.

Backports commit 71f09a5bb48d0c51b87e70158407ec2db4a9c6e2 from qemu
This commit is contained in:
Alistair Francis 2019-05-28 19:17:52 -04:00 committed by Lioncash
parent 47e4e047bc
commit 2e6d11ee47
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 6 additions and 3 deletions
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9
qemu/target/riscv/cpu_bits.h
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@ -202,6 +202,12 @@
#define CSR_DPC 0x7b1 #define CSR_DPC 0x7b1
#define CSR_DSCRATCH 0x7b2 #define CSR_DSCRATCH 0x7b2
/* Hypervisor CSRs */
#define CSR_HSTATUS 0xa00
#define CSR_HEDELEG 0xa02
#define CSR_HIDELEG 0xa03
#define CSR_HGATP 0xa80
/* Performance Counters */ /* Performance Counters */
#define CSR_MHPMCOUNTER3 0xb03 #define CSR_MHPMCOUNTER3 0xb03
#define CSR_MHPMCOUNTER4 0xb04 #define CSR_MHPMCOUNTER4 0xb04
@ -292,9 +298,6 @@
#define CSR_MHPMCOUNTER31H 0xb9f #define CSR_MHPMCOUNTER31H 0xb9f
/* Legacy Hypervisor Trap Setup (priv v1.9.1) */ /* Legacy Hypervisor Trap Setup (priv v1.9.1) */
#define CSR_HSTATUS 0x200
#define CSR_HEDELEG 0x202
#define CSR_HIDELEG 0x203
#define CSR_HIE 0x204 #define CSR_HIE 0x204
#define CSR_HTVEC 0x205 #define CSR_HTVEC 0x205