From 3922118434c474c4d3d0b6c7c4d1f852635837c4 Mon Sep 17 00:00:00 2001
From: Cao Jiaxi <driver1998@foxmail.com>
Date: Thu, 9 May 2019 17:43:18 -0400
Subject: [PATCH] util/cacheinfo: Use uint64_t on LLP64 model to satisfy
 Windows ARM64

Windows ARM64 uses LLP64 model, which breaks current assumptions.

Backports commit 8041336ef74e19ca607c1601016333c986de8f9c from qemu
---
 qemu/util/cacheinfo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qemu/util/cacheinfo.c b/qemu/util/cacheinfo.c
index 82c5358c..2937d451 100644
--- a/qemu/util/cacheinfo.c
+++ b/qemu/util/cacheinfo.c
@@ -101,7 +101,7 @@ static void sys_cache_info(int *isize, int *dsize)
 static void arch_cache_info(int *isize, int *dsize)
 {
     if (*isize == 0 || *dsize == 0) {
-        unsigned long ctr;
+        uint64_t ctr;
 
         /* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
            but (at least under Linux) these are marked protected by the