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target/mips: Rename MMI-related functions

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Rename MMI-related functions.

Backports commit 874b28797045f574adb10b69c28006ca143f9280 from qemu
This commit is contained in:
Aleksandar Markovic 2018-11-23 18:51:58 -05:00 committed by Lioncash
parent f51b980772
commit 3b89ca7188
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 16 additions and 16 deletions
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32
qemu/target/mips/translate.c
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@ -26626,7 +26626,7 @@ static void decode_opc_special3_legacy(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi0(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI0(ctx->opcode);
@ -26665,7 +26665,7 @@ static void decode_tx79_mmi0(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi1(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI1(ctx->opcode);
@ -26697,7 +26697,7 @@ static void decode_tx79_mmi1(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi2(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI2(ctx->opcode);
@ -26733,7 +26733,7 @@ static void decode_tx79_mmi2(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi3(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI3(ctx->opcode);
@ -26760,7 +26760,7 @@ static void decode_tx79_mmi3(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi(CPUMIPSState *env, DisasContext *ctx)
{
uint32_t opc = MASK_MMI(ctx->opcode);
int rs = extract32(ctx->opcode, 21, 5);
@ -26769,16 +26769,16 @@ static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
switch (opc) {
case MMI_OPC_CLASS_MMI0:
decode_tx79_mmi0(env, ctx);
decode_mmi0(env, ctx);
break;
case MMI_OPC_CLASS_MMI1:
decode_tx79_mmi1(env, ctx);
decode_mmi1(env, ctx);
break;
case MMI_OPC_CLASS_MMI2:
decode_tx79_mmi2(env, ctx);
decode_mmi2(env, ctx);
break;
case MMI_OPC_CLASS_MMI3:
decode_tx79_mmi3(env, ctx);
decode_mmi3(env, ctx);
break;
case MMI_OPC_MULT1:
case MMI_OPC_MULTU1:
@ -26818,12 +26818,12 @@ static void decode_tx79_mmi(CPUMIPSState *env, DisasContext *ctx)
}
}
static void decode_tx79_lq(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi_lq(CPUMIPSState *env, DisasContext *ctx)
{
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_LQ */
}
static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
static void gen_mmi_sq(DisasContext *ctx, int base, int rt, int offset)
{
generate_exception_end(ctx, EXCP_RI); /* TODO: MMI_OPC_SQ */
}
@ -26849,7 +26849,7 @@ static void gen_tx79_sq(DisasContext *ctx, int base, int rt, int offset)
* In user mode, QEMU must verify the upper and lower 11 bits to distinguish
* between SQ and RDHWR, as the Linux kernel does.
*/
static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
static void decode_mmi_sq(CPUMIPSState *env, DisasContext *ctx)
{
int base = extract32(ctx->opcode, 21, 5);
int rt = extract32(ctx->opcode, 16, 5);
@ -26867,7 +26867,7 @@ static void decode_tx79_sq(CPUMIPSState *env, DisasContext *ctx)
}
#endif
gen_tx79_sq(ctx, base, rt, offset);
gen_mmi_sq(ctx, base, rt, offset);
}
static void decode_opc_special3(CPUMIPSState *env, DisasContext *ctx)
@ -28209,7 +28209,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pat
break;
case OPC_SPECIAL2:
if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
decode_tx79_mmi(env, ctx);
decode_mmi(env, ctx);
} else if (ctx->insn_flags & ASE_MXU) {
decode_opc_mxu(env, ctx);
} else {
@ -28218,7 +28218,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pat
break;
case OPC_SPECIAL3:
if (ctx->insn_flags & INSN_R5900) {
decode_tx79_sq(env, ctx); /* MMI_OPC_SQ */
decode_mmi_sq(env, ctx); /* MMI_OPC_SQ */
} else {
decode_opc_special3(env, ctx);
}
@ -28891,7 +28891,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx, bool *insn_need_pat
break;
case OPC_MSA: /* OPC_MDMX */
if (ctx->insn_flags & INSN_R5900) {
decode_tx79_lq(env, ctx); /* MMI_OPC_LQ */
decode_mmi_lq(env, ctx); /* MMI_OPC_LQ */
} else {
/* MDMX: Not implemented. */
gen_msa(env, ctx);