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no more spinlock

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This commit is contained in:
Nguyen Anh Quynh 2017-01-20 14:57:33 +08:00
parent a7fca49f7a
commit 42771848d6
19 changed files with 0 additions and 98 deletions
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1
include/qemu.h
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@ -14,7 +14,6 @@ struct uc_struct;
#include "qemu/thread.h"
#include "include/qom/cpu.h"
#include "exec/spinlock.h"
#include "vl.h"

1
include/uc_priv.h
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@ -177,7 +177,6 @@ struct uc_struct {
RAMList ram_list; // qemu/exec.c
BounceBuffer bounce; // qemu/cpu-exec.c
volatile sig_atomic_t exit_request; // qemu/cpu-exec.c
spinlock_t x86_global_cpu_lock; // for X86 arch only
bool global_dirty_log; // qemu/memory.c
/* This is a multi-level map on the virtual address space.
The bottom level has pointers to PageDesc. */

2
qemu/aarch64.h
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@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_aarch64
#define sort_constraints sort_constraints_aarch64
#define sp_el0_access sp_el0_access_aarch64
#define spin_lock spin_lock_aarch64
#define spin_unlock spin_unlock_aarch64
#define spsel_read spsel_read_aarch64
#define spsel_write spsel_write_aarch64
#define start_list start_list_aarch64

2
qemu/arm.h
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@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_arm
#define sort_constraints sort_constraints_arm
#define sp_el0_access sp_el0_access_arm
#define spin_lock spin_lock_arm
#define spin_unlock spin_unlock_arm
#define spsel_read spsel_read_arm
#define spsel_write spsel_write_arm
#define start_list start_list_arm

11
qemu/cpu-exec.c
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@ -67,9 +67,6 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
struct hook *hook;
/* This must be volatile so it is not trashed by longjmp() */
volatile bool have_tb_lock = false;
if (cpu->halted) {
if (!cpu_has_work(cpu)) {
return EXCP_HALTED;
@ -208,8 +205,6 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
cpu->exception_index = EXCP_INTERRUPT;
cpu_loop_exit(cpu);
}
spin_lock(&tcg_ctx->tb_ctx.tb_lock);
have_tb_lock = true;
tb = tb_find_fast(env); // qq
if (!tb) { // invalid TB due to invalid code?
uc->invalid_error = UC_ERR_FETCH_UNMAPPED;
@ -232,8 +227,6 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
tb_add_jump((TranslationBlock *)(next_tb & ~TB_EXIT_MASK),
next_tb & TB_EXIT_MASK, tb);
}
have_tb_lock = false;
spin_unlock(&tcg_ctx->tb_ctx.tb_lock);
/* cpu_interrupt might be called while translating the
TB, but before it is linked into a potentially
@ -275,10 +268,6 @@ int cpu_exec(struct uc_struct *uc, CPUArchState *env) // qq
#ifdef TARGET_I386
x86_cpu = X86_CPU(uc, cpu);
#endif
if (have_tb_lock) {
spin_unlock(&tcg_ctx->tb_ctx.tb_lock);
have_tb_lock = false;
}
}
} /* for(;;) */

2
qemu/header_gen.py
View File

@ -2603,8 +2603,6 @@ symbols = (
'softmmu_unlock_user',
'sort_constraints',
'sp_el0_access',
'spin_lock',
'spin_unlock',
'spsel_read',
'spsel_write',
'start_list',

4
qemu/include/exec/exec-all.h
View File

@ -169,8 +169,6 @@ struct TranslationBlock {
uint32_t icount;
};
#include "exec/spinlock.h"
typedef struct TBContext TBContext;
struct TBContext {
@ -178,8 +176,6 @@ struct TBContext {
TranslationBlock *tbs;
TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
int nb_tbs;
/* any access to the tbs or the page table must use this lock */
spinlock_t tb_lock;
/* statistics */
int tb_flush_count;

53
qemu/include/exec/spinlock.h
View File

@ -1,53 +0,0 @@
/*
* Copyright (c) 2003 Fabrice Bellard
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>
*/
/* configure guarantees us that we have pthreads on any host except
* mingw32, which doesn't support any of the user-only targets.
* So we can simply assume we have pthread mutexes here.
*/
#ifndef QEMU_EXEC_SPINLOCK_H
#define QEMU_EXEC_SPINLOCK_H
#if defined(CONFIG_USER_ONLY)
#include <pthread.h>
#define spin_lock pthread_mutex_lock
#define spin_unlock pthread_mutex_unlock
#define spinlock_t pthread_mutex_t
#define SPIN_LOCK_UNLOCKED PTHREAD_MUTEX_INITIALIZER
#else
/* Empty implementations, on the theory that system mode emulation
* is single-threaded. This means that these functions should only
* be used from code run in the TCG cpu thread, and cannot protect
* data structures which might also be accessed from the IO thread
* or from signal handlers.
*/
typedef int spinlock_t;
#define SPIN_LOCK_UNLOCKED 0
static inline void spin_lock(spinlock_t *lock)
{
}
static inline void spin_unlock(spinlock_t *lock)
{
}
#endif
#endif

2
qemu/m68k.h
View File

@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_m68k
#define sort_constraints sort_constraints_m68k
#define sp_el0_access sp_el0_access_m68k
#define spin_lock spin_lock_m68k
#define spin_unlock spin_unlock_m68k
#define spsel_read spsel_read_m68k
#define spsel_write spsel_write_m68k
#define start_list start_list_m68k

2
qemu/mips.h
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@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_mips
#define sort_constraints sort_constraints_mips
#define sp_el0_access sp_el0_access_mips
#define spin_lock spin_lock_mips
#define spin_unlock spin_unlock_mips
#define spsel_read spsel_read_mips
#define spsel_write spsel_write_mips
#define start_list start_list_mips

2
qemu/mips64.h
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@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_mips64
#define sort_constraints sort_constraints_mips64
#define sp_el0_access sp_el0_access_mips64
#define spin_lock spin_lock_mips64
#define spin_unlock spin_unlock_mips64
#define spsel_read spsel_read_mips64
#define spsel_write spsel_write_mips64
#define start_list start_list_mips64

2
qemu/mips64el.h
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@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_mips64el
#define sort_constraints sort_constraints_mips64el
#define sp_el0_access sp_el0_access_mips64el
#define spin_lock spin_lock_mips64el
#define spin_unlock spin_unlock_mips64el
#define spsel_read spsel_read_mips64el
#define spsel_write spsel_write_mips64el
#define start_list start_list_mips64el

2
qemu/mipsel.h
View File

@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_mipsel
#define sort_constraints sort_constraints_mipsel
#define sp_el0_access sp_el0_access_mipsel
#define spin_lock spin_lock_mipsel
#define spin_unlock spin_unlock_mipsel
#define spsel_read spsel_read_mipsel
#define spsel_write spsel_write_mipsel
#define start_list start_list_mipsel

2
qemu/powerpc.h
View File

@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_powerpc
#define sort_constraints sort_constraints_powerpc
#define sp_el0_access sp_el0_access_powerpc
#define spin_lock spin_lock_powerpc
#define spin_unlock spin_unlock_powerpc
#define spsel_read spsel_read_powerpc
#define spsel_write spsel_write_powerpc
#define start_list start_list_powerpc

2
qemu/sparc.h
View File

@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_sparc
#define sort_constraints sort_constraints_sparc
#define sp_el0_access sp_el0_access_sparc
#define spin_lock spin_lock_sparc
#define spin_unlock spin_unlock_sparc
#define spsel_read spsel_read_sparc
#define spsel_write spsel_write_sparc
#define start_list start_list_sparc

2
qemu/sparc64.h
View File

@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_sparc64
#define sort_constraints sort_constraints_sparc64
#define sp_el0_access sp_el0_access_sparc64
#define spin_lock spin_lock_sparc64
#define spin_unlock spin_unlock_sparc64
#define spsel_read spsel_read_sparc64
#define spsel_write spsel_write_sparc64
#define start_list start_list_sparc64

2
qemu/target-i386/mem_helper.c
View File

@ -27,12 +27,10 @@
void helper_lock(CPUX86State *env)
{
spin_lock(&x86_env_get_cpu(env)->parent_obj.uc->x86_global_cpu_lock);
}
void helper_unlock(CPUX86State *env)
{
spin_unlock(&x86_env_get_cpu(env)->parent_obj.uc->x86_global_cpu_lock);
}
void helper_cmpxchg8b(CPUX86State *env, target_ulong a0)

2
qemu/x86_64.h
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@ -2597,8 +2597,6 @@
#define softmmu_unlock_user softmmu_unlock_user_x86_64
#define sort_constraints sort_constraints_x86_64
#define sp_el0_access sp_el0_access_x86_64
#define spin_lock spin_lock_x86_64
#define spin_unlock spin_unlock_x86_64
#define spsel_read spsel_read_x86_64
#define spsel_write spsel_write_x86_64
#define start_list start_list_x86_64

2
uc.c
View File

@ -157,8 +157,6 @@ uc_err uc_open(uc_arch arch, uc_mode mode, uc_engine **result)
uc->ram_list.blocks.tqh_first = NULL;
uc->ram_list.blocks.tqh_last = &(uc->ram_list.blocks.tqh_first);
uc->x86_global_cpu_lock = SPIN_LOCK_UNLOCKED;
uc->memory_listeners.tqh_first = NULL;
uc->memory_listeners.tqh_last = &uc->memory_listeners.tqh_first;