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target-mips: move group of functions above gen_load_fpr32()

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Move the "Tests" group of functions so that gen_load_fpr32() and
gen_store_fpr32() can use generate_exception().

Backports commit eab9944c7801525737626fa45cddaf00932dd2c8 from qemu
This commit is contained in:
Leon Alrae 2018-02-13 12:44:59 -05:00 committed by Lioncash
parent 91503663e2
commit 428ffed744
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 58 additions and 64 deletions
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122
qemu/target-mips/translate.c
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@ -1547,6 +1547,64 @@ static inline void gen_store_srsgpr (DisasContext *s, int from, int to)
}
}
/* Tests */
static inline void gen_save_pc(target_ulong pc)
{
tcg_gen_movi_tl(cpu_PC, pc);
}
static inline void save_cpu_state(DisasContext *ctx, int do_save_pc)
{
LOG_DISAS("hflags %08x saved %08x\n", ctx->hflags, ctx->saved_hflags);
if (do_save_pc && ctx->pc != ctx->saved_pc) {
gen_save_pc(ctx->pc);
ctx->saved_pc = ctx->pc;
}
if (ctx->hflags != ctx->saved_hflags) {
tcg_gen_movi_i32(hflags, ctx->hflags);
ctx->saved_hflags = ctx->hflags;
switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_BR:
break;
case MIPS_HFLAG_BC:
case MIPS_HFLAG_BL:
case MIPS_HFLAG_B:
tcg_gen_movi_tl(btarget, ctx->btarget);
break;
}
}
}
static inline void restore_cpu_state(CPUMIPSState *env, DisasContext *ctx)
{
ctx->saved_hflags = ctx->hflags;
switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_BR:
break;
case MIPS_HFLAG_BC:
case MIPS_HFLAG_BL:
case MIPS_HFLAG_B:
ctx->btarget = env->btarget;
break;
}
}
static inline void generate_exception_err(DisasContext *ctx, int excp, int err)
{
TCGv_i32 texcp = tcg_const_i32(excp);
TCGv_i32 terr = tcg_const_i32(err);
save_cpu_state(ctx, 1);
gen_helper_raise_exception_err(cpu_env, texcp, terr);
tcg_temp_free_i32(terr);
tcg_temp_free_i32(texcp);
}
static inline void generate_exception(DisasContext *ctx, int excp)
{
save_cpu_state(ctx, 1);
gen_helper_0e0i(raise_exception, excp);
}
/* Floating point register moves. */
static void gen_load_fpr32(DisasContext *s, TCGv_i32 t, int reg)
{
@ -1622,70 +1680,6 @@ static inline int get_fp_bit (int cc)
return 23;
}
/* Tests */
static inline void gen_save_pc(DisasContext *ctx, target_ulong pc)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_PC, pc);
}
static inline void save_cpu_state (DisasContext *ctx, int do_save_pc)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
LOG_DISAS("hflags %08x saved %08x\n", ctx->hflags, ctx->saved_hflags);
if (do_save_pc && ctx->pc != ctx->saved_pc) {
gen_save_pc(ctx, ctx->pc);
ctx->saved_pc = ctx->pc;
}
if (ctx->hflags != ctx->saved_hflags) {
tcg_gen_movi_i32(tcg_ctx, tcg_ctx->hflags, ctx->hflags);
ctx->saved_hflags = ctx->hflags;
switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_BR:
break;
case MIPS_HFLAG_BC:
case MIPS_HFLAG_BL:
case MIPS_HFLAG_B:
tcg_gen_movi_tl(tcg_ctx, *(TCGv *)tcg_ctx->btarget, ctx->btarget);
break;
}
}
}
static inline void restore_cpu_state (CPUMIPSState *env, DisasContext *ctx)
{
ctx->saved_hflags = ctx->hflags;
switch (ctx->hflags & MIPS_HFLAG_BMASK_BASE) {
case MIPS_HFLAG_BR:
break;
case MIPS_HFLAG_BC:
case MIPS_HFLAG_BL:
case MIPS_HFLAG_B:
ctx->btarget = env->btarget;
break;
}
}
static inline void
generate_exception_err (DisasContext *ctx, int excp, int err)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv_i32 texcp = tcg_const_i32(tcg_ctx, excp);
TCGv_i32 terr = tcg_const_i32(tcg_ctx, err);
save_cpu_state(ctx, 1);
gen_helper_raise_exception_err(tcg_ctx, tcg_ctx->cpu_env, texcp, terr);
tcg_temp_free_i32(tcg_ctx, terr);
tcg_temp_free_i32(tcg_ctx, texcp);
}
static inline void
generate_exception (DisasContext *ctx, int excp)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
save_cpu_state(ctx, 1);
gen_helper_0e0i(tcg_ctx, raise_exception, excp);
}
/* Addresses computation */
static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv arg1)
{