From 4eafe42d673d4f0a0730645b5582bcaafea12265 Mon Sep 17 00:00:00 2001 From: Peter Maydell Date: Wed, 3 Mar 2021 18:06:19 -0500 Subject: [PATCH] target/arm: Enforce M-profile VMRS/VMSR register restrictions For M-profile before v8.1M, the only valid register for VMSR/VMRS is the FPSCR. We have a comment that states this, but the actual logic to forbid accesses for any other register value is missing, so we would end up with A-profile style behaviour. Add the missing check. Backports ede97c9d71110821738a48f88ff9f10d6bec017f --- qemu/target/arm/translate-vfp.inc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/qemu/target/arm/translate-vfp.inc.c b/qemu/target/arm/translate-vfp.inc.c index b7d97e75..fc487488 100644 --- a/qemu/target/arm/translate-vfp.inc.c +++ b/qemu/target/arm/translate-vfp.inc.c @@ -632,7 +632,10 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a) * Accesses to R15 are UNPREDICTABLE; we choose to undef. * (FPSCR -> r15 is a special case which writes to the PSR flags.) */ - if (a->rt == 15 && (!a->l || a->reg != ARM_VFP_FPSCR)) { + if (a->reg != ARM_VFP_FPSCR) { + return false; + } + if (a->rt == 15 && !a->l) { return false; } }