exec: extract exec/tb-context.h

TCG backends do not need most of exec-all.h; extract what they actually
need to a separate file or move it directly to tcg.h. The next patch
will stop including exec-all.h from everywhere.

Backports commit 00f6da6a1a5d1ce085334eccbb50ec899ceed513 from qemu

msvc/unicorn/unicorn/unicorn.vcxproj

@@ -285,6 +285,8 @@ copy $(SolutionDir)..\include\unicorn\*.h $(SolutionDir)distro\include\unicorn\
     <ClInclude Include="..\..\..\qemu\include\exec\ram_addr.h" />
     <ClInclude Include="..\..\..\qemu\include\exec\softmmu-semi.h" />
     <ClInclude Include="..\..\..\qemu\include\exec\spinlock.h" />
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-context.h" />
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-hash.h" />
     <ClInclude Include="..\..\..\qemu\include\fpu\softfloat.h" />
     <ClInclude Include="..\..\..\qemu\include\glib_compat.h" />
     <ClInclude Include="..\..\..\qemu\include\crypto\aes.h" />

msvc/unicorn/unicorn/unicorn.vcxproj.filters

@@ -295,6 +295,12 @@
     <ClInclude Include="..\..\..\qemu\include\exec\spinlock.h">
       <Filter>qemu\include\exec</Filter>
     </ClInclude>
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-context.h">
+      <Filter>qemu\include\exec</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-hash.h">
+      <Filter>qemu\include\exec</Filter>
+    </ClInclude>
     <ClInclude Include="..\..\..\qemu\include\fpu\softfloat.h">
       <Filter>qemu\include\fpu</Filter>
     </ClInclude>

msvc/unicorn/unicorn_static/unicorn_static.vcxproj

@@ -99,6 +99,8 @@
     <ClInclude Include="..\..\..\qemu\include\exec\ram_addr.h" />
     <ClInclude Include="..\..\..\qemu\include\exec\softmmu-semi.h" />
     <ClInclude Include="..\..\..\qemu\include\exec\spinlock.h" />
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-context.h" />
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-hash.h" />
     <ClInclude Include="..\..\..\qemu\include\fpu\softfloat.h" />
     <ClInclude Include="..\..\..\qemu\include\glib_compat.h" />
     <ClInclude Include="..\..\..\qemu\include\crypto\aes.h" />

msvc/unicorn/unicorn_static/unicorn_static.vcxproj.filters

@@ -285,6 +285,12 @@
     <ClInclude Include="..\..\..\qemu\include\exec\spinlock.h">
       <Filter>qemu\include\exec</Filter>
     </ClInclude>
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-context.h">
+      <Filter>qemu\include\exec</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\qemu\include\exec\tb-hash.h">
+      <Filter>qemu\include\exec</Filter>
+    </ClInclude>
     <ClInclude Include="..\..\..\qemu\include\fpu\softfloat.h">
       <Filter>qemu\include\fpu</Filter>
     </ClInclude>

qemu/include/exec/exec-all.h

@@ -21,6 +21,7 @@
 #define _EXEC_ALL_H_
 
 #include "qemu-common.h"
+#include "exec/tb-context.h"
 
 /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS
@@ -40,29 +41,6 @@ typedef ram_addr_t tb_page_addr_t;
 #define DISAS_UPDATE  2 /* cpu state was modified dynamically */
 #define DISAS_TB_JUMP 3 /* only pc was modified statically */
 
-struct TranslationBlock;
-typedef struct TranslationBlock TranslationBlock;
-
-/* XXX: make safe guess about sizes */
-#define MAX_OP_PER_INSTR 266
-
-#if HOST_LONG_BITS == 32
-#define MAX_OPC_PARAM_PER_ARG 2
-#else
-#define MAX_OPC_PARAM_PER_ARG 1
-#endif
-#define MAX_OPC_PARAM_IARGS 5
-#define MAX_OPC_PARAM_OARGS 1
-#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS)
-
-/* A Call op needs up to 4 + 2N parameters on 32-bit archs,
- * and up to 4 + N parameters on 64-bit archs
- * (N = number of input arguments + output arguments).  */
-#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
-#define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)
-
-#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM)
-
 #include "qemu/log.h"
 
 void gen_intermediate_code(CPUArchState *env, struct TranslationBlock *tb);
@@ -212,9 +190,6 @@ static inline void tlb_flush_by_mmuidx(CPUState *cpu, ...)
 
 #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */
 
-#define CODE_GEN_PHYS_HASH_BITS     15
-#define CODE_GEN_PHYS_HASH_SIZE     (1 << CODE_GEN_PHYS_HASH_BITS)
-
 /* Estimated block size for TB allocation.  */
 /* ??? The following is based on a 2015 survey of x86_64 host output.
    Better would seem to be some sort of dynamically sized TB array,
@@ -286,19 +261,6 @@ struct TranslationBlock {
     uintptr_t jmp_list_first;
 };
 
-typedef struct TBContext TBContext;
-
-struct TBContext {
-
-    TranslationBlock *tbs;
-    TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
-    int nb_tbs;
-
-    /* statistics */
-    int tb_flush_count;
-    int tb_phys_invalidate_count;
-};
-
 void tb_free(struct uc_struct *uc, TranslationBlock *tb);
 void tb_flush(CPUState *cpu);
 void tb_phys_invalidate(struct uc_struct *uc,

qemu/include/exec/tb-context.h

@@ -0,0 +1,42 @@
+/*
+ * Internal structs that QEMU exports to TCG
+ *
+ *  Copyright (c) 2003 Fabrice Bellard
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef QEMU_TB_CONTEXT_H_
+#define QEMU_TB_CONTEXT_H_
+
+#include "qemu/thread.h"
+
+#define CODE_GEN_PHYS_HASH_BITS     15
+#define CODE_GEN_PHYS_HASH_SIZE     (1 << CODE_GEN_PHYS_HASH_BITS)
+
+typedef struct TranslationBlock TranslationBlock;
+typedef struct TBContext TBContext;
+
+struct TBContext {
+
+    TranslationBlock *tbs;
+    TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
+    int nb_tbs;
+
+    /* statistics */
+    int tb_flush_count;
+    int tb_phys_invalidate_count;
+};
+
+#endif

qemu/tcg/optimize.c

@@ -24,9 +24,8 @@
  */
 
 #include "qemu/osdep.h"
-
 #include "qemu-common.h"
-#include "cpu.h"
+#include "exec/cpu-common.h"
 #include "tcg-op.h"
 
 #define CASE_OP_32_64(x)                        \

qemu/tcg/tcg-common.c

@@ -23,6 +23,8 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "exec/cpu-common.h"
 #include "tcg/tcg.h"
 
 const TCGOpDef tcg_op_defs_org[TCG_OP_DEFS_TABLE_SIZE] = {

qemu/tcg/tcg.h

@@ -27,12 +27,34 @@
 
 #include "qemu-common.h"
 #include "cpu.h"
+#include "exec/tb-context.h"
 #include "qemu/bitops.h"
 #include "tcg-target.h"
 #include "exec/exec-all.h"
 
 #include "uc_priv.h"
 
+/* XXX: make safe guess about sizes */
+#define MAX_OP_PER_INSTR 266
+
+#if HOST_LONG_BITS == 32
+#define MAX_OPC_PARAM_PER_ARG 2
+#else
+#define MAX_OPC_PARAM_PER_ARG 1
+#endif
+#define MAX_OPC_PARAM_IARGS 5
+#define MAX_OPC_PARAM_OARGS 1
+#define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS)
+
+/* A Call op needs up to 4 + 2N parameters on 32-bit archs,
+ * and up to 4 + N parameters on 64-bit archs
+ * (N = number of input arguments + output arguments).  */
+#define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
+#define OPC_BUF_SIZE 640
+#define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)
+
+#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM)
+
 #define CPU_TEMP_BUF_NLONGS 128
 
 /* Default target word size to pointer size.  */