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target/arm: Update aa64_zva_access for EL2

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The comment that we don't support EL2 is somewhat out of date.
Update to include checks against HCR_EL2.TDZ.

Backports commit 4351cb72fb65926136ab618c9e40c1f5a8813251 from qemu
This commit is contained in:
Richard Henderson 2020-03-21 15:30:33 -04:00 committed by Lioncash
parent 3a5135473f
commit 6886ba66d0
1 changed files with 21 additions and 5 deletions
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26
qemu/target/arm/helper.c
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@ -3962,11 +3962,27 @@ static void tlbi_aa64_ipas2e1is_write(CPUARMState *env, const ARMCPRegInfo *ri,
static CPAccessResult aa64_zva_access(CPUARMState *env, const ARMCPRegInfo *ri,
bool isread)
{
/* We don't implement EL2, so the only control on DC ZVA is the
* bit in the SCTLR which can prohibit access for EL0.
*/
if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_DZE)) {
return CP_ACCESS_TRAP;
int cur_el = arm_current_el(env);
if (cur_el < 2) {
uint64_t hcr = arm_hcr_el2_eff(env);
if (cur_el == 0) {
if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {
if (!(env->cp15.sctlr_el[2] & SCTLR_DZE)) {
return CP_ACCESS_TRAP_EL2;
}
} else {
if (!(env->cp15.sctlr_el[1] & SCTLR_DZE)) {
return CP_ACCESS_TRAP;
}
if (hcr & HCR_TDZ) {
return CP_ACCESS_TRAP_EL2;
}
}
} else if (hcr & HCR_TDZ) {
return CP_ACCESS_TRAP_EL2;
}
}
return CP_ACCESS_OK;
}