yuzu-emu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2024-10-19 16:18:21 +02:00
Code Issues Packages Projects Releases Wiki Activity

tcg: Change tcg_global_mem_new_* to take a TCGv_ptr

Browse Source 
Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.

Backports commit e1ccc05444676b92c63708096e36582be27fbee1 from qemu
This commit is contained in:
Richard Henderson 2018-02-08 12:16:49 -05:00 committed by Lioncash
parent afb67fc002
commit 6b4b493dae
No known key found for this signature in database
GPG Key ID: 4E3C3CC1031BA9C7
8 changed files with 109 additions and 102 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
qemu/target-arm/translate-a64.c
View File

@ -86,30 +86,30 @@ void a64_translate_init(struct uc_struct *uc)
TCGContext *tcg_ctx = uc->tcg_ctx;
int i;
tcg_ctx->cpu_pc = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_pc = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, pc),
"pc");
for (i = 0; i < 32; i++) {
tcg_ctx->cpu_X[i] = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_X[i] = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, xregs[i]),
regnames[i]);
}
tcg_ctx->cpu_NF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, NF), "NF");
tcg_ctx->cpu_ZF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, ZF), "ZF");
tcg_ctx->cpu_CF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, CF), "CF");
tcg_ctx->cpu_VF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, VF), "VF");
tcg_ctx->cpu_NF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, NF), "NF");
tcg_ctx->cpu_ZF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, ZF), "ZF");
tcg_ctx->cpu_CF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, CF), "CF");
tcg_ctx->cpu_VF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, VF), "VF");
tcg_ctx->cpu_exclusive_addr = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_exclusive_addr = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_addr), "exclusive_addr");
tcg_ctx->cpu_exclusive_val = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_exclusive_val = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_val), "exclusive_val");
tcg_ctx->cpu_exclusive_high = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_exclusive_high = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_high), "exclusive_high");
#ifdef CONFIG_USER_ONLY
cpu_exclusive_test = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
cpu_exclusive_test = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_test), "exclusive_test");
cpu_exclusive_info = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0,
cpu_exclusive_info = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_info), "exclusive_info");
#endif
}

18
qemu/target-arm/translate.c
View File

@ -77,23 +77,23 @@ void arm_translate_init(struct uc_struct *uc)
tcg_ctx->cpu_env = tcg_global_reg_new_ptr(uc->tcg_ctx, TCG_AREG0, "env");
for (i = 0; i < 16; i++) {
tcg_ctx->cpu_R[i] = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_R[i] = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, regs[i]),
regnames[i]);
}
tcg_ctx->cpu_CF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, CF), "CF");
tcg_ctx->cpu_NF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, NF), "NF");
tcg_ctx->cpu_VF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, VF), "VF");
tcg_ctx->cpu_ZF = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0, offsetof(CPUARMState, ZF), "ZF");
tcg_ctx->cpu_CF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, CF), "CF");
tcg_ctx->cpu_NF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, NF), "NF");
tcg_ctx->cpu_VF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, VF), "VF");
tcg_ctx->cpu_ZF = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUARMState, ZF), "ZF");
tcg_ctx->cpu_exclusive_addr = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_exclusive_addr = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_addr), "exclusive_addr");
tcg_ctx->cpu_exclusive_val = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_exclusive_val = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_val), "exclusive_val");
#ifdef CONFIG_USER_ONLY
cpu_exclusive_test = tcg_global_mem_new_i64(uc->tcg_ctx, TCG_AREG0,
cpu_exclusive_test = tcg_global_mem_new_i64(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_test), "exclusive_test");
cpu_exclusive_info = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0,
cpu_exclusive_info = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUARMState, exclusive_info), "exclusive_info");
#endif

10
qemu/target-i386/translate.c
View File

@ -8556,23 +8556,23 @@ void optimize_flags_init(struct uc_struct *uc)
TCGContext *tcg_ctx = uc->tcg_ctx;
tcg_ctx->cpu_env = tcg_global_reg_new_ptr(uc->tcg_ctx, TCG_AREG0, "env");
tcg_ctx->cpu_cc_op = tcg_global_mem_new_i32(uc->tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_cc_op = tcg_global_mem_new_i32(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUX86State, cc_op), "cc_op");
tcg_ctx->cpu_cc_dst = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_cc_dst) = tcg_global_mem_new(uc->tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_cc_dst) = tcg_global_mem_new(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUX86State, cc_dst), "cc_dst");
tcg_ctx->cpu_cc_src = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_cc_src) = tcg_global_mem_new(uc->tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_cc_src) = tcg_global_mem_new(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUX86State, cc_src), "cc_src");
tcg_ctx->cpu_cc_src2 = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_cc_src2) = tcg_global_mem_new(uc->tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_cc_src2) = tcg_global_mem_new(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUX86State, cc_src2), "cc_src2");
for (i = 0; i < CPU_NB_REGS; ++i) {
tcg_ctx->cpu_regs[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_regs[i]) = tcg_global_mem_new(uc->tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_regs[i]) = tcg_global_mem_new(uc->tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUX86State, regs[i]),
reg_names[i]);
}

24
qemu/target-m68k/translate.c
View File

@ -49,57 +49,57 @@ void m68k_tcg_init(struct uc_struct *uc)
char *p;
int i;
#define DEFO32(name, offset) if (!uc->init_tcg) { tcg_ctx->QREG_##name = g_malloc0(sizeof(TCGv));} *((TCGv *)tcg_ctx->QREG_##name) = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0, offsetof(CPUM68KState, offset), #name);
#define DEFO64(name, offset) tcg_ctx->QREG_##name = tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0, offsetof(CPUM68KState, offset), #name);
tcg_ctx->cpu_env = tcg_global_reg_new_ptr(tcg_ctx, TCG_AREG0, "env");
#define DEFO32(name, offset) if (!uc->init_tcg) { tcg_ctx->QREG_##name = g_malloc0(sizeof(TCGv));} *((TCGv *)tcg_ctx->QREG_##name) = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUM68KState, offset), #name);
#define DEFO64(name, offset) tcg_ctx->QREG_##name = tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUM68KState, offset), #name);
#define DEFF64(name, offset) DEFO64(name, offset)
#include "qregs.def"
#undef DEFO32
#undef DEFO64
#undef DEFF64
// tcg_ctx->QREG_FP_RESULT = tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0, offsetof(CPUM68KState, fp_result), "FP_RESULT");
// tcg_ctx->QREG_FP_RESULT = tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUM68KState, fp_result), "FP_RESULT");
tcg_ctx->cpu_halted = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_halted = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env,
0-offsetof(M68kCPU, env) +
offsetof(CPUState, halted), "HALTED");
tcg_ctx->cpu_env = tcg_global_reg_new_ptr(tcg_ctx, TCG_AREG0, "env");
p = tcg_ctx->cpu_reg_names;
for (i = 0; i < 8; i++) {
sprintf(p, "D%d", i);
if (!uc->init_tcg)
tcg_ctx->cpu_dregs[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_dregs[i]) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_dregs[i]) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUM68KState, dregs[i]), p);
p += 3;
sprintf(p, "A%d", i);
if (!uc->init_tcg)
tcg_ctx->cpu_aregs[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_aregs[i]) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_aregs[i]) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUM68KState, aregs[i]), p);
p += 3;
sprintf(p, "F%d", i);
tcg_ctx->cpu_fregs[i] = tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_fregs[i] = tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUM68KState, fregs[i]), p);
p += 3;
}
for (i = 0; i < 4; i++) {
sprintf(p, "ACC%d", i);
tcg_ctx->cpu_macc[i] = tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_macc[i] = tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUM68KState, macc[i]), p);
p += 5;
}
if (!uc->init_tcg)
tcg_ctx->NULL_QREG = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->NULL_QREG) = tcg_global_mem_new(tcg_ctx, TCG_AREG0, -4, "NULL");
*((TCGv *)tcg_ctx->NULL_QREG) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, -4, "NULL");
if (!uc->init_tcg)
tcg_ctx->store_dummy = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->store_dummy) = tcg_global_mem_new(tcg_ctx, TCG_AREG0, -8, "NULL");
*((TCGv *)tcg_ctx->store_dummy) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, -8, "NULL");
uc->init_tcg = true;
}

24
qemu/target-mips/translate.c
View File

@ -19480,7 +19480,7 @@ void mips_tcg_init(struct uc_struct *uc)
if (!uc->init_tcg) {
for (i = 0; i < 32; i++) {
tcg_ctx->cpu_gpr[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_gpr[i]) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_gpr[i]) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_tc.gpr[i]),
regnames[i]);
}
@ -19492,28 +19492,28 @@ void mips_tcg_init(struct uc_struct *uc)
for (i = 0; i < 32; i++) {
int off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[0]);
tcg_ctx->msa_wr_d[i * 2] =
tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0, off, msaregnames[i * 2]);
tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env, off, msaregnames[i * 2]);
/* The scalar floating-point unit (FPU) registers are mapped on
* the MSA vector registers. */
tcg_ctx->fpu_f64[i] = tcg_ctx->msa_wr_d[i * 2];
off = offsetof(CPUMIPSState, active_fpu.fpr[i].wr.d[1]);
tcg_ctx->msa_wr_d[i * 2 + 1] =
tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0, off, msaregnames[i * 2 + 1]);
tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env, off, msaregnames[i * 2 + 1]);
}
if (!uc->init_tcg)
tcg_ctx->cpu_PC = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_PC) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_PC) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_tc.PC), "PC");
if (!uc->init_tcg) {
for (i = 0; i < MIPS_DSP_ACC; i++) {
tcg_ctx->cpu_HI[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_HI[i]) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_HI[i]) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_tc.HI[i]),
regnames_HI[i]);
tcg_ctx->cpu_LO[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_LO[i]) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_LO[i]) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_tc.LO[i]),
regnames_LO[i]);
}
@ -19521,27 +19521,27 @@ void mips_tcg_init(struct uc_struct *uc)
if (!uc->init_tcg)
tcg_ctx->cpu_dspctrl = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_dspctrl) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_dspctrl) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_tc.DSPControl),
"DSPControl");
if (!uc->init_tcg)
tcg_ctx->bcond = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->bcond) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->bcond) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, bcond), "bcond");
if (!uc->init_tcg)
tcg_ctx->btarget = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->btarget) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->btarget) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, btarget), "btarget");
tcg_ctx->hflags = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0,
tcg_ctx->hflags = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, hflags), "hflags");
//tcg_ctx->fpu_fcr0 = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0,
//tcg_ctx->fpu_fcr0 = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env,
// offsetof(CPUMIPSState, active_fpu.fcr0),
// "fcr0");
tcg_ctx->fpu_fcr31 = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0,
tcg_ctx->fpu_fcr31 = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUMIPSState, active_fpu.fcr31),
"fcr31");
uc->init_tcg = true;

56
qemu/target-sparc/translate.c
View File

@ -5562,136 +5562,136 @@ void gen_intermediate_code_init(CPUSPARCState *env)
/* init various static tables */
tcg_ctx->cpu_env = tcg_global_reg_new_ptr(tcg_ctx, TCG_AREG0, "env");
tcg_ctx->cpu_regwptr = tcg_global_mem_new_ptr(tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_regwptr = tcg_global_mem_new_ptr(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, regwptr),
"regwptr");
#ifdef TARGET_SPARC64
tcg_ctx->cpu_xcc = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, xcc),
tcg_ctx->cpu_xcc = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, xcc),
"xcc");
tcg_ctx->cpu_asi = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, asi),
tcg_ctx->cpu_asi = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, asi),
"asi");
tcg_ctx->cpu_fprs = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, fprs),
tcg_ctx->cpu_fprs = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, fprs),
"fprs");
if (!uc->init_tcg)
tcg_ctx->cpu_gsr = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_gsr = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, gsr),
*(TCGv *)tcg_ctx->cpu_gsr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, gsr),
"gsr");
if (!uc->init_tcg)
tcg_ctx->cpu_tick_cmpr = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_tick_cmpr = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*(TCGv *)tcg_ctx->cpu_tick_cmpr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, tick_cmpr),
"tick_cmpr");
if (!uc->init_tcg)
tcg_ctx->cpu_stick_cmpr = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_stick_cmpr = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*(TCGv *)tcg_ctx->cpu_stick_cmpr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, stick_cmpr),
"stick_cmpr");
if (!uc->init_tcg)
tcg_ctx->cpu_hstick_cmpr = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_hstick_cmpr = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*(TCGv *)tcg_ctx->cpu_hstick_cmpr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, hstick_cmpr),
"hstick_cmpr");
if (!uc->init_tcg)
tcg_ctx->cpu_hintp = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_hintp = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, hintp),
*(TCGv *)tcg_ctx->cpu_hintp = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, hintp),
"hintp");
if (!uc->init_tcg)
tcg_ctx->cpu_htba = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_htba = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, htba),
*(TCGv *)tcg_ctx->cpu_htba = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, htba),
"htba");
if (!uc->init_tcg)
tcg_ctx->cpu_hver = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_hver = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, hver),
*(TCGv *)tcg_ctx->cpu_hver = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, hver),
"hver");
if (!uc->init_tcg)
tcg_ctx->cpu_ssr = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_ssr = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*(TCGv *)tcg_ctx->cpu_ssr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, ssr), "ssr");
if (!uc->init_tcg)
tcg_ctx->cpu_ver = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_ver = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*(TCGv *)tcg_ctx->cpu_ver = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, version), "ver");
tcg_ctx->cpu_softint = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_softint = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, softint),
"softint");
#else
if (!uc->init_tcg)
tcg_ctx->cpu_wim = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_wim = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, wim),
*(TCGv *)tcg_ctx->cpu_wim = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, wim),
"wim");
#endif
if (!uc->init_tcg)
tcg_ctx->cpu_cond = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_cond = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, cond),
*(TCGv *)tcg_ctx->cpu_cond = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, cond),
"cond");
if (!uc->init_tcg)
tcg_ctx->cpu_cc_src = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_cc_src) = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, cc_src),
*((TCGv *)tcg_ctx->cpu_cc_src) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, cc_src),
"cc_src");
if (!uc->init_tcg)
tcg_ctx->cpu_cc_src2 = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_cc_src2) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_cc_src2) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, cc_src2),
"cc_src2");
if (!uc->init_tcg)
tcg_ctx->cpu_cc_dst = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_cc_dst = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, cc_dst),
*(TCGv *)tcg_ctx->cpu_cc_dst = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, cc_dst),
"cc_dst");
tcg_ctx->cpu_cc_op = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, cc_op),
tcg_ctx->cpu_cc_op = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, cc_op),
"cc_op");
tcg_ctx->cpu_psr = tcg_global_mem_new_i32(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, psr),
tcg_ctx->cpu_psr = tcg_global_mem_new_i32(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, psr),
"psr");
if (!uc->init_tcg)
tcg_ctx->cpu_fsr = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_fsr) = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, fsr),
*((TCGv *)tcg_ctx->cpu_fsr) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, fsr),
"fsr");
if (!uc->init_tcg)
tcg_ctx->sparc_cpu_pc = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->sparc_cpu_pc = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, pc),
*(TCGv *)tcg_ctx->sparc_cpu_pc = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, pc),
"pc");
if (!uc->init_tcg)
tcg_ctx->cpu_npc = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_npc = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, npc),
*(TCGv *)tcg_ctx->cpu_npc = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, npc),
"npc");
if (!uc->init_tcg)
tcg_ctx->cpu_y = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_y = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, y), "y");
*(TCGv *)tcg_ctx->cpu_y = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, y), "y");
#ifndef CONFIG_USER_ONLY
if (!uc->init_tcg)
tcg_ctx->cpu_tbr = g_malloc0(sizeof(TCGv));
*(TCGv *)tcg_ctx->cpu_tbr = tcg_global_mem_new(tcg_ctx, TCG_AREG0, offsetof(CPUSPARCState, tbr),
*(TCGv *)tcg_ctx->cpu_tbr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tbr),
"tbr");
#endif
if (!uc->init_tcg) {
for (i = 0; i < 8; i++) {
tcg_ctx->cpu_gregs[i] = g_malloc0(sizeof(TCGv));
*((TCGv *)tcg_ctx->cpu_gregs[i]) = tcg_global_mem_new(tcg_ctx, TCG_AREG0,
*((TCGv *)tcg_ctx->cpu_gregs[i]) = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, gregs[i]),
gregnames[i]);
}
}
for (i = 0; i < TARGET_DPREGS; i++) {
tcg_ctx->cpu_fpr[i] = tcg_global_mem_new_i64(tcg_ctx, TCG_AREG0,
tcg_ctx->cpu_fpr[i] = tcg_global_mem_new_i64(tcg_ctx, tcg_ctx->cpu_env,
offsetof(CPUSPARCState, fpr[i]),
fregnames[i]);
}

21
qemu/tcg/tcg.c
View File

@ -463,12 +463,11 @@ TCGv_i64 tcg_global_reg_new_i64(TCGContext *s, int reg, const char *name)
return MAKE_TCGV_I64(idx);
}
static inline int tcg_global_mem_new_internal(TCGContext *s, TCGType type, int reg,
intptr_t offset,
const char *name)
int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base,
intptr_t offset, const char *name)
{
TCGTemp *ts;
int idx;
TCGTemp *ts, *base_ts = &s->temps[GET_TCGV_PTR(base)];
int idx, reg = base_ts->reg;
idx = s->nb_globals;
#if TCG_TARGET_REG_BITS == 32
@ -523,18 +522,6 @@ static inline int tcg_global_mem_new_internal(TCGContext *s, TCGType type, int r
return idx;
}
TCGv_i32 tcg_global_mem_new_i32(TCGContext *s, int reg, intptr_t offset, const char *name)
{
int idx = tcg_global_mem_new_internal(s, TCG_TYPE_I32, reg, offset, name);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_global_mem_new_i64(TCGContext *s, int reg, intptr_t offset, const char *name)
{
int idx = tcg_global_mem_new_internal(s, TCG_TYPE_I64, reg, offset, name);
return MAKE_TCGV_I64(idx);
}
static inline int tcg_temp_new_internal(TCGContext *s, TCGType type, int temp_local)
{
TCGTemp *ts;

36
qemu/tcg/tcg.h
View File

@ -469,33 +469,53 @@ int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
int tcg_global_mem_new_internal(TCGContext *s, TCGType type, TCGv_ptr base, intptr_t offset, const char *name);
TCGv_i32 tcg_global_reg_new_i32(TCGContext *s, int reg, const char *name);
TCGv_i32 tcg_global_mem_new_i32(TCGContext *s, int reg, intptr_t offset, const char *name);
TCGv_i64 tcg_global_reg_new_i64(TCGContext *s, int reg, const char *name);
TCGv_i32 tcg_temp_new_internal_i32(TCGContext *s, int temp_local);
TCGv_i64 tcg_temp_new_internal_i64(TCGContext *s, int temp_local);
void tcg_temp_free_i32(TCGContext *s, TCGv_i32 arg);
void tcg_temp_free_i64(TCGContext *s, TCGv_i64 arg);
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
static inline TCGv_i32 tcg_global_mem_new_i32(TCGContext *s, TCGv_ptr reg,
intptr_t offset, const char *name)
{
int idx = tcg_global_mem_new_internal(s, TCG_TYPE_I32, reg, offset, name);
return MAKE_TCGV_I32(idx);
}
static inline TCGv_i32 tcg_temp_new_i32(TCGContext *s)
{
return tcg_temp_new_internal_i32(s, 0);
}
static inline TCGv_i32 tcg_temp_local_new_i32(TCGContext *s)
{
return tcg_temp_new_internal_i32(s, 1);
}
void tcg_temp_free_i32(TCGContext *s, TCGv_i32 arg);
char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
TCGv_i64 tcg_global_reg_new_i64(TCGContext *s, int reg, const char *name);
TCGv_i64 tcg_global_mem_new_i64(TCGContext *s, int reg, intptr_t offset, const char *name);
TCGv_i64 tcg_temp_new_internal_i64(TCGContext *s, int temp_local);
static inline TCGv_i64 tcg_global_mem_new_i64(TCGContext *s, TCGv_ptr reg,
intptr_t offset, const char *name)
{
int idx = tcg_global_mem_new_internal(s, TCG_TYPE_I64, reg, offset, name);
return MAKE_TCGV_I64(idx);
}
static inline TCGv_i64 tcg_temp_new_i64(TCGContext *s)
{
return tcg_temp_new_internal_i64(s, 0);
}
static inline TCGv_i64 tcg_temp_local_new_i64(TCGContext *s)
{
return tcg_temp_new_internal_i64(s, 1);
}
void tcg_temp_free_i64(TCGContext *s, TCGv_i64 arg);
char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
#if defined(CONFIG_DEBUG_TCG)
/* If you call tcg_clear_temp_count() at the start of a section of