merge msvc with master

This commit is contained in:
Nguyen Anh Quynh 2017-02-24 10:39:36 +08:00
commit 6ea39f7d5a
40 changed files with 327 additions and 512 deletions

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@ -1,7 +1,32 @@
This file details the changelog of Unicorn Engine.
----------------------------------
[Version 1.0-rc2]: Janyary 4th, 2017
[Version 1.0]: February 23rd, 2017
- Fix build script for BSD host.
- Fix building Unicorn on Arm/PPC/Sparc/S390 hosts.
- X86:
- Fix 16bit address computation.
- Fix initial state of segment registers.
----------------------------------
[Version 1.0-rc3]: January 25th, 2017
- Rename API uc_context_free() to uc_free().
- ARM:
- uc_reg_write() now can modify CPSR register.
- Add some ARM coproc registers.
- ARM64: uc_reg_read|write() now handles W0-W31 registers.
- Windows: fix a double free bug in uc_close().
- New VB6 binding.
- Java: update to support new APIs from v1.0-rc1.
- Python:
- Fix memory leaking that prevents UC instances from being GC.
- Remove some dependencies leftover from glib time.
- Add new method mem_regions() (linked to uc_mem_regions() API)
----------------------------------
[Version 1.0-rc2]: January 4th, 2017
- Remove glib & pkconfig dependency.
- Python: fix an issue to restore support for FreeBSD (and other *BSD Unix).

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@ -307,7 +307,7 @@ uninstall:
clean:
$(MAKE) -C qemu clean
rm -rf *.d *.o
rm -rf lib$(LIBNAME)* $(LIBNAME)*.lib $(LIBNAME)*.dll $(LIBNAME)*.exp cyg$(LIBNAME)*.dll
rm -rf lib$(LIBNAME)* $(LIBNAME)*.lib $(LIBNAME)*.dll $(LIBNAME)*.a $(LIBNAME)*.def $(LIBNAME)*.exp cyg$(LIBNAME)*.dll
$(MAKE) -C samples clean
$(MAKE) -C tests/unit clean

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@ -120,7 +120,10 @@ module Arm =
let UC_ARM_REG_S29 = 108
let UC_ARM_REG_S30 = 109
let UC_ARM_REG_S31 = 110
let UC_ARM_REG_ENDING = 111
let UC_ARM_REG_C1_C0_2 = 111
let UC_ARM_REG_C13_C0_2 = 112
let UC_ARM_REG_C13_C0_3 = 113
let UC_ARM_REG_ENDING = 114
// alias registers
let UC_ARM_REG_R13 = 12

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@ -115,7 +115,10 @@ const (
ARM_REG_S29 = 108
ARM_REG_S30 = 109
ARM_REG_S31 = 110
ARM_REG_ENDING = 111
ARM_REG_C1_C0_2 = 111
ARM_REG_C13_C0_2 = 112
ARM_REG_C13_C0_3 = 113
ARM_REG_ENDING = 114
// alias registers
ARM_REG_R13 = 12

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@ -117,7 +117,10 @@ public interface ArmConst {
public static final int UC_ARM_REG_S29 = 108;
public static final int UC_ARM_REG_S30 = 109;
public static final int UC_ARM_REG_S31 = 110;
public static final int UC_ARM_REG_ENDING = 111;
public static final int UC_ARM_REG_C1_C0_2 = 111;
public static final int UC_ARM_REG_C13_C0_2 = 112;
public static final int UC_ARM_REG_C13_C0_3 = 113;
public static final int UC_ARM_REG_ENDING = 114;
// alias registers
public static final int UC_ARM_REG_R13 = 12;

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@ -24,9 +24,6 @@ IS_64BITS = platform.architecture()[0] == '64bit'
ALL_WINDOWS_DLLS = (
"libwinpthread-1.dll",
"libgcc_s_seh-1.dll" if IS_64BITS else "libgcc_s_dw2-1.dll",
"libiconv-2.dll",
"libpcre-1.dll",
"libintl-8.dll",
)
# are we building from the repository or from a source distribution?

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@ -113,7 +113,10 @@ UC_ARM_REG_S28 = 107
UC_ARM_REG_S29 = 108
UC_ARM_REG_S30 = 109
UC_ARM_REG_S31 = 110
UC_ARM_REG_ENDING = 111
UC_ARM_REG_C1_C0_2 = 111
UC_ARM_REG_C13_C0_2 = 112
UC_ARM_REG_C13_C0_3 = 113
UC_ARM_REG_ENDING = 114
# alias registers
UC_ARM_REG_R13 = 12

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@ -30,9 +30,6 @@ _all_windows_dlls = (
"libwinpthread-1.dll",
"libgcc_s_seh-1.dll",
"libgcc_s_dw2-1.dll",
"libiconv-2.dll",
"libpcre-1.dll",
"libintl-8.dll",
)
_loaded_windows_dlls = set()
@ -108,6 +105,14 @@ uc_engine = ctypes.c_void_p
uc_context = ctypes.c_void_p
uc_hook_h = ctypes.c_size_t
class _uc_mem_region(ctypes.Structure):
_fields_ = [
("begin", ctypes.c_uint64),
("end", ctypes.c_uint64),
("perms", ctypes.c_uint32),
]
_setup_prototype(_uc, "uc_version", ctypes.c_uint, ctypes.POINTER(ctypes.c_int), ctypes.POINTER(ctypes.c_int))
_setup_prototype(_uc, "uc_arch_supported", ctypes.c_bool, ctypes.c_int)
_setup_prototype(_uc, "uc_open", ucerr, ctypes.c_uint, ctypes.c_uint, ctypes.POINTER(uc_engine))
@ -130,6 +135,7 @@ _setup_prototype(_uc, "uc_context_alloc", ucerr, uc_engine, ctypes.POINTER(uc_co
_setup_prototype(_uc, "uc_free", ucerr, ctypes.c_void_p)
_setup_prototype(_uc, "uc_context_save", ucerr, uc_engine, uc_context)
_setup_prototype(_uc, "uc_context_restore", ucerr, uc_engine, uc_context)
_setup_prototype(_uc, "uc_mem_regions", ucerr, uc_engine, ctypes.POINTER(ctypes.POINTER(_uc_mem_region)), ctypes.POINTER(ctypes.c_uint32))
# uc_hook_add is special due to variable number of arguments
_uc.uc_hook_add = _uc.uc_hook_add
@ -511,6 +517,21 @@ class Uc(object):
if status != uc.UC_ERR_OK:
raise UcError(status)
# this returns a generator of regions in the form (begin, end, perms)
def mem_regions(self):
regions = ctypes.POINTER(_uc_mem_region)()
count = ctypes.c_uint32()
status = _uc.uc_mem_regions(self._uch, ctypes.byref(regions), ctypes.byref(count))
if status != uc.UC_ERR_OK:
raise UcError(status)
try:
for i in range(count.value):
yield (regions[i].begin, regions[i].end, regions[i].perms)
finally:
_uc.uc_free(regions)
class SavedContext(object):
def __init__(self, pointer):
self.pointer = pointer

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@ -5,7 +5,7 @@
# Use bundle install && rake to install gem and test
install: gen_const
cd unicorn_gem && rake build
cd unicorn_gem && gem install --local pkg/unicorn-0.9.0.gem
cd unicorn_gem && gem install --local pkg/unicorn-1.0.0.gem
gen_const:
cd .. && python const_generator.py ruby

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@ -258,7 +258,7 @@ def test_i386_invalid_mem_write()
r_ecx = mu.reg_read(UC_X86_REG_ECX)
r_edx = mu.reg_read(UC_X86_REG_EDX)
puts ">>> ECX = 0x%x" % r_ecx
puts ">>> ECX = 0x%x" % r_ecx
puts ">>> EDX = 0x%x" % r_edx
begin
@ -282,6 +282,47 @@ def test_i386_invalid_mem_write()
end
end
def test_i386_context_save()
puts("Save/restore CPU context in opaque blob")
address = 0
code = '\x40' # inc eax
begin
# Initialize emulator
mu = Uc.new UC_ARCH_X86, UC_MODE_32
# map 8KB memory for this emulation
mu.mem_map(address, 8 * 1024, UC_PROT_ALL)
# write machine code to be emulated to memory
mu.mem_write(address, code)
# set eax to 1
mu.reg_write(UC_X86_REG_EAX, 1)
puts(">>> Running emulation for the first time")
mu.emu_start(address, address+1)
puts(">>> Emulation done. Below is the CPU context")
puts(">>> EAX = 0x%x" %(mu.reg_read(UC_X86_REG_EAX)))
puts(">>> Saving CPU context")
saved_context = mu.context_save()
puts(">>> Running emulation for the second time")
mu.emu_start(address, address+1)
puts(">>> Emulation done. Below is the CPU context")
puts(">>> EAX = 0x%x" %(mu.reg_read(UC_X86_REG_EAX)))
puts(">>> CPU context restored. Below is the CPU context")
mu.context_restore(saved_context)
puts(">>> EAX = 0x%x" %(mu.reg_read(UC_X86_REG_EAX)))
rescue UcError => e
puts("ERROR: %s" % e)
end
end
# Test X86 32 bit with IN/OUT instruction
def test_i386_inout()
puts("Emulate i386 code with IN/OUT instructions")
@ -500,6 +541,8 @@ test_i386_invalid_mem_read()
puts("=" * 20)
test_i386_invalid_mem_write()
puts("=" * 20)
test_i386_context_save()
puts("=" * 20)
test_i386_inout()
puts("=" * 20)
test_x86_64()

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@ -26,12 +26,14 @@ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
VALUE UnicornModule = Qnil;
VALUE UcClass = Qnil;
VALUE UcError = Qnil;
VALUE SavedContext = Qnil;
void Init_unicorn() {
rb_require("unicorn/unicorn_const");
UnicornModule = rb_define_module("Unicorn");
UcError = rb_define_class_under(UnicornModule, "UcError", rb_eStandardError);
SavedContext = rb_define_class_under(UnicornModule, "SavedContext", rb_cObject);
UcClass = rb_define_class_under(UnicornModule, "Uc", rb_cObject);
rb_define_method(UcClass, "initialize", m_uc_initialize, 2);
@ -47,6 +49,9 @@ void Init_unicorn() {
rb_define_method(UcClass, "hook_add", m_uc_hook_add, -1);
rb_define_method(UcClass, "hook_del", m_uc_hook_del, 1);
rb_define_method(UcClass, "query", m_uc_hook_del, 1);
rb_define_method(UcClass, "context_save", m_uc_context_save, 0);
rb_define_method(UcClass, "context_update", m_uc_context_update, 1);
rb_define_method(UcClass, "contest_restore", m_uc_context_restore, 1);
}
VALUE m_uc_initialize(VALUE self, VALUE arch, VALUE mode) {
@ -422,3 +427,53 @@ VALUE m_uc_query(VALUE self, VALUE query_mode){
}
return INT2NUM(result);
}
VALUE m_uc_context_save(VALUE self){
uc_err err;
uc_engine *_uc;
Data_Get_Struct(rb_iv_get(self,"@uch"), uc_engine, _uc);
uc_context *_context;
err = uc_context_alloc(_uc, &_context);
if (err != UC_ERR_OK) {
rb_raise(UcError, "%s", uc_strerror(err));
}
err = uc_context_save(_uc, _context);
if (err != UC_ERR_OK) {
rb_raise(UcError, "%s", uc_strerror(err));
}
VALUE sc = Data_Wrap_Struct(SavedContext, 0, uc_free, _context);
return sc;
}
VALUE m_uc_context_update(VALUE self, VALUE context){
uc_err err;
uc_engine *_uc;
Data_Get_Struct(rb_iv_get(self,"@uch"), uc_engine, _uc);
uc_context *_context;
Data_Get_Struct(context, uc_context, _context);
err = uc_context_save(_uc, _context);
if (err != UC_ERR_OK) {
rb_raise(UcError, "%s", uc_strerror(err));
}
return Qnil;
}
VALUE m_uc_context_restore(VALUE self, VALUE context){
uc_err err;
uc_engine *_uc;
Data_Get_Struct(rb_iv_get(self,"@uch"), uc_engine, _uc);
uc_context *_context;
Data_Get_Struct(context, uc_context, _context);
err = uc_context_restore(_uc, _context);
if (err != UC_ERR_OK) {
rb_raise(UcError, "%s", uc_strerror(err));
}
return Qnil;
}

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@ -30,4 +30,7 @@ VALUE m_uc_mem_unmap(VALUE self, VALUE address, VALUE size);
VALUE m_uc_mem_protect(VALUE self, VALUE address, VALUE size, VALUE perms);
VALUE m_uc_hook_add(int argc, VALUE* argv, VALUE self);
VALUE m_uc_hook_del(VALUE self, VALUE hook);
VALUE m_uc_query(VALUE self, VALUE query_mode);
VALUE m_uc_query(VALUE self, VALUE query_mode);
VALUE m_uc_context_save(VALUE self);
VALUE m_uc_context_update(VALUE self, VALUE context);
VALUE m_uc_context_restore(VALUE self, VALUE context);

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@ -115,7 +115,10 @@ module Unicorn
UC_ARM_REG_S29 = 108
UC_ARM_REG_S30 = 109
UC_ARM_REG_S31 = 110
UC_ARM_REG_ENDING = 111
UC_ARM_REG_C1_C0_2 = 111
UC_ARM_REG_C13_C0_2 = 112
UC_ARM_REG_C13_C0_3 = 113
UC_ARM_REG_ENDING = 114
# alias registers
UC_ARM_REG_R13 = 12

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@ -102,18 +102,12 @@ To run sample_x86.exe on Windows 32-bit, you need the following files:
unicorn.dll
%MSYS2%\mingw32\bin\libgcc_s_dw2-1.dll
%MSYS2%\mingw32\bin\libiconv-2.dll
%MSYS2%\mingw32\bin\libintl-8.dll
%MSYS2%\mingw32\bin\libpcre-1.dll
%MSYS2%\mingw32\bin\libwinpthread-1.dll
To run sample_x86.exe on Windows 64-bit, you need the following files:
unicorn.dll
%MSYS2%\mingw64\bin\libgcc_s_seh-1.dll
%MSYS2%\mingw64\bin\libiconv-2.dll
%MSYS2%\mingw64\bin\libintl-8.dll
%MSYS2%\mingw64\bin\libpcre-1.dll
%MSYS2%\mingw64\bin\libwinpthread-1.dll

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@ -126,6 +126,10 @@ typedef enum uc_arm_reg {
UC_ARM_REG_S30,
UC_ARM_REG_S31,
UC_ARM_REG_C1_C0_2,
UC_ARM_REG_C13_C0_2,
UC_ARM_REG_C13_C0_3,
UC_ARM_REG_ENDING, // <-- mark the end of the list or registers
//> alias registers

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@ -206,7 +206,7 @@ typedef enum uc_mem_type {
typedef enum uc_hook_type {
// Hook all interrupt/syscall events
UC_HOOK_INTR = 1 << 0,
// Hook a particular instruction
// Hook a particular instruction - only a very small subset of instructions supported here
UC_HOOK_INSN = 1 << 1,
// Hook a range of code
UC_HOOK_CODE = 1 << 2,

10
make.sh
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@ -48,7 +48,7 @@ build_linux32() {
LDFLAGS=-m32 \
LDFLAGS_STATIC=-m32 \
LIBRARY_PATH="/usr/lib/i386-linux-gnu" \
UNICORN_QEMU_FLAGS="--cpu=i386" \
UNICORN_QEMU_FLAGS="--cpu=i386 ${UNICORN_QEMU_FLAGS}" \
${MAKE}
}
@ -99,6 +99,11 @@ msvc_update_genfiles() {
cp qemu/x86_64-softmmu/config-target.h msvc/unicorn/x86_64-softmmu/config-target.h
}
[ -z "${UNAME}" ] && UNAME=$(uname)
[ -z "${MAKE}" ] && MAKE=make
#[ -n "${MAKE_JOBS}" ] && MAKE="$MAKE -j${MAKE_JOBS}"
if [ "$UNAME" = SunOS ]; then
[ -z "${MAKE}" ] && MAKE=gmake
INSTALL_BIN=ginstall
@ -110,9 +115,6 @@ if [ -n "`echo "$UNAME" | grep BSD`" ]; then
PREFIX="${PREFIX-/usr/local}"
fi
[ -z "${UNAME}" ] && UNAME=$(uname)
[ -z "${MAKE}" ] && MAKE=make
#[ -n "${MAKE_JOBS}" ] && MAKE="$MAKE -j${MAKE_JOBS}"
export CC INSTALL_BIN PREFIX PKGCFGDIR LIBDIRARCH LIBARCHS CFLAGS LDFLAGS
case "$1" in

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@ -10,4 +10,4 @@ PKG_MINOR = 0
PKG_EXTRA = 0
# version tag. Examples: rc1, b2, post1
PKG_TAG = rc2
PKG_TAG =

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@ -7,8 +7,6 @@ util-obj-y = util/ qobject/ qapi/ qapi-types.o qapi-visit.o
block-obj-y =
block-obj-y += ../uc.o ../list.o glib_compat.o
#block-obj-$(CONFIG_POSIX) += aio-posix.o
#block-obj-$(CONFIG_WIN32) += aio-win32.o
#######################################################################
# Target independent part of system emulation. The long term path is to
@ -18,7 +16,6 @@ block-obj-y += ../uc.o ../list.o glib_compat.o
ifeq ($(CONFIG_SOFTMMU),y)
common-obj-y += hw/
common-obj-y += accel.o
common-obj-y += vl.o qemu-timer.o
endif

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_aarch64
#define add_qemu_ldst_label add_qemu_ldst_label_aarch64
#define address_space_access_valid address_space_access_valid_aarch64
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_aarch64
#define address_space_destroy address_space_destroy_aarch64
#define address_space_destroy_dispatch address_space_destroy_dispatch_aarch64
#define address_space_get_flatview address_space_get_flatview_aarch64
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64
#define address_space_translate_internal address_space_translate_internal_aarch64
#define address_space_unmap address_space_unmap_aarch64
#define address_space_update_ioeventfds address_space_update_ioeventfds_aarch64
#define address_space_update_topology address_space_update_topology_aarch64
#define address_space_update_topology_pass address_space_update_topology_pass_aarch64
#define address_space_write address_space_write_aarch64
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_aarch64
#define addrrange_intersects addrrange_intersects_aarch64
#define addrrange_make addrrange_make_aarch64
#define addrrange_shift addrrange_shift_aarch64
#define adjust_endianness adjust_endianness_aarch64
#define all_helpers all_helpers_aarch64
#define alloc_code_gen_buffer alloc_code_gen_buffer_aarch64
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_aarch64
#define memory_mapping_list_init memory_mapping_list_init_aarch64
#define memory_region_access_valid memory_region_access_valid_aarch64
#define memory_region_add_eventfd memory_region_add_eventfd_aarch64
#define memory_region_add_subregion memory_region_add_subregion_aarch64
#define memory_region_add_subregion_common memory_region_add_subregion_common_aarch64
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_aarch64
#define memory_region_big_endian memory_region_big_endian_aarch64
#define memory_region_clear_coalescing memory_region_clear_coalescing_aarch64
#define memory_region_clear_pending memory_region_clear_pending_aarch64
#define memory_region_del_eventfd memory_region_del_eventfd_aarch64
#define memory_region_del_subregion memory_region_del_subregion_aarch64
#define memory_region_destructor_alias memory_region_destructor_alias_aarch64
#define memory_region_destructor_none memory_region_destructor_none_aarch64
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_aarch64
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_aarch64
#define memory_region_init_reservation memory_region_init_reservation_aarch64
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_aarch64
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_aarch64
#define memory_region_is_iommu memory_region_is_iommu_aarch64
#define memory_region_is_logging memory_region_is_logging_aarch64
#define memory_region_is_mapped memory_region_is_mapped_aarch64
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_aarch64
#define memory_region_transaction_commit memory_region_transaction_commit_aarch64
#define memory_region_unref memory_region_unref_aarch64
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_aarch64
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_aarch64
#define memory_region_update_container_subregions memory_region_update_container_subregions_aarch64
#define memory_region_write_accessor memory_region_write_accessor_aarch64
#define memory_region_wrong_endianness memory_region_wrong_endianness_aarch64

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_arm
#define add_qemu_ldst_label add_qemu_ldst_label_arm
#define address_space_access_valid address_space_access_valid_arm
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_arm
#define address_space_destroy address_space_destroy_arm
#define address_space_destroy_dispatch address_space_destroy_dispatch_arm
#define address_space_get_flatview address_space_get_flatview_arm
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_arm
#define address_space_translate_internal address_space_translate_internal_arm
#define address_space_unmap address_space_unmap_arm
#define address_space_update_ioeventfds address_space_update_ioeventfds_arm
#define address_space_update_topology address_space_update_topology_arm
#define address_space_update_topology_pass address_space_update_topology_pass_arm
#define address_space_write address_space_write_arm
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_arm
#define addrrange_intersects addrrange_intersects_arm
#define addrrange_make addrrange_make_arm
#define addrrange_shift addrrange_shift_arm
#define adjust_endianness adjust_endianness_arm
#define all_helpers all_helpers_arm
#define alloc_code_gen_buffer alloc_code_gen_buffer_arm
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_arm
#define memory_mapping_list_init memory_mapping_list_init_arm
#define memory_region_access_valid memory_region_access_valid_arm
#define memory_region_add_eventfd memory_region_add_eventfd_arm
#define memory_region_add_subregion memory_region_add_subregion_arm
#define memory_region_add_subregion_common memory_region_add_subregion_common_arm
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_arm
#define memory_region_big_endian memory_region_big_endian_arm
#define memory_region_clear_coalescing memory_region_clear_coalescing_arm
#define memory_region_clear_pending memory_region_clear_pending_arm
#define memory_region_del_eventfd memory_region_del_eventfd_arm
#define memory_region_del_subregion memory_region_del_subregion_arm
#define memory_region_destructor_alias memory_region_destructor_alias_arm
#define memory_region_destructor_none memory_region_destructor_none_arm
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_arm
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_arm
#define memory_region_init_reservation memory_region_init_reservation_arm
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_arm
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_arm
#define memory_region_is_iommu memory_region_is_iommu_arm
#define memory_region_is_logging memory_region_is_logging_arm
#define memory_region_is_mapped memory_region_is_mapped_arm
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_arm
#define memory_region_transaction_commit memory_region_transaction_commit_arm
#define memory_region_unref memory_region_unref_arm
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_arm
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_arm
#define memory_region_update_container_subregions memory_region_update_container_subregions_arm
#define memory_region_write_accessor memory_region_write_accessor_arm
#define memory_region_wrong_endianness memory_region_wrong_endianness_arm

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@ -62,7 +62,6 @@ symbols = (
'addFloatx80Sigs',
'add_qemu_ldst_label',
'address_space_access_valid',
'address_space_add_del_ioeventfds',
'address_space_destroy',
'address_space_destroy_dispatch',
'address_space_get_flatview',
@ -76,7 +75,6 @@ symbols = (
'address_space_translate_for_iotlb',
'address_space_translate_internal',
'address_space_unmap',
'address_space_update_ioeventfds',
'address_space_update_topology',
'address_space_update_topology_pass',
'address_space_write',
@ -86,7 +84,6 @@ symbols = (
'addrrange_intersection',
'addrrange_intersects',
'addrrange_make',
'addrrange_shift',
'adjust_endianness',
'all_helpers',
'alloc_code_gen_buffer',
@ -2017,14 +2014,11 @@ symbols = (
'memory_mapping_list_free',
'memory_mapping_list_init',
'memory_region_access_valid',
'memory_region_add_eventfd',
'memory_region_add_subregion',
'memory_region_add_subregion_common',
'memory_region_add_subregion_overlap',
'memory_region_big_endian',
'memory_region_clear_coalescing',
'memory_region_clear_pending',
'memory_region_del_eventfd',
'memory_region_del_subregion',
'memory_region_destructor_alias',
'memory_region_destructor_none',
@ -2053,8 +2047,6 @@ symbols = (
'memory_region_init_ram',
'memory_region_init_ram_ptr',
'memory_region_init_reservation',
'memory_region_ioeventfd_before',
'memory_region_ioeventfd_equal',
'memory_region_is_iommu',
'memory_region_is_logging',
'memory_region_is_mapped',
@ -2084,8 +2076,6 @@ symbols = (
'memory_region_transaction_begin',
'memory_region_transaction_commit',
'memory_region_unref',
'memory_region_update_coalesced_range',
'memory_region_update_coalesced_range_as',
'memory_region_update_container_subregions',
'memory_region_write_accessor',
'memory_region_wrong_endianness',

View File

@ -116,6 +116,22 @@
#define R_SPARC_5 44
#define R_SPARC_6 45
/* Bits present in AT_HWCAP for ARM. */
#define HWCAP_ARM_IDIVA (1 << 17)
/* Bits present in AT_HWCAP for s390. */
#define HWCAP_S390_STFLE 4
/* Bits present in AT_HWCAP for Sparc. */
#define HWCAP_SPARC_VIS3 0x00020000
/* Symbolic values for the entries in the auxiliary table
put on the initial stack */
#define AT_PLATFORM 15 /* string identifying CPU for optimizations */
#define AT_HWCAP 16 /* arch dependent hints at CPU capabilities */
/*
* 68k ELF relocation types
*/

View File

@ -22,9 +22,7 @@
#include "unicorn/platform.h"
#include "qemu-common.h"
#include "exec/cpu-common.h"
#ifndef CONFIG_USER_ONLY
#include "exec/hwaddr.h"
#endif
#include "qemu/queue.h"
#include "qemu/int128.h"
#include "qapi/error.h"
@ -128,9 +126,6 @@ struct MemoryRegionIOMMUOps {
IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, bool is_write);
};
typedef struct CoalescedMemoryRange CoalescedMemoryRange;
typedef struct MemoryRegionIoeventfd MemoryRegionIoeventfd;
struct MemoryRegion {
Object parent_obj;
/* All fields are private - violators will be prosecuted */
@ -152,18 +147,14 @@ struct MemoryRegion {
bool enabled;
bool rom_device;
bool warning_printed; /* For reservations */
bool flush_coalesced_mmio;
MemoryRegion *alias;
hwaddr alias_offset;
int32_t priority;
bool may_overlap;
QTAILQ_HEAD(subregions, MemoryRegion) subregions;
QTAILQ_ENTRY(MemoryRegion) subregions_link;
QTAILQ_HEAD(coalesced_ranges, CoalescedMemoryRange) coalesced;
const char *name;
uint8_t dirty_log_mask;
unsigned ioeventfd_nb;
MemoryRegionIoeventfd *ioeventfds;
struct uc_struct *uc;
uint32_t perms; //all perms, partially redundant with readonly
uint64_t end;
@ -186,14 +177,6 @@ struct MemoryListener {
void (*log_sync)(MemoryListener *listener, MemoryRegionSection *section);
void (*log_global_start)(MemoryListener *listener);
void (*log_global_stop)(MemoryListener *listener);
void (*eventfd_add)(MemoryListener *listener, MemoryRegionSection *section,
bool match_data, uint64_t data, EventNotifier *e);
void (*eventfd_del)(MemoryListener *listener, MemoryRegionSection *section,
bool match_data, uint64_t data, EventNotifier *e);
void (*coalesced_mmio_add)(MemoryListener *listener, MemoryRegionSection *section,
hwaddr addr, hwaddr len);
void (*coalesced_mmio_del)(MemoryListener *listener, MemoryRegionSection *section,
hwaddr addr, hwaddr len);
/* Lower = earlier (during add), later (during del) */
unsigned priority;
AddressSpace *address_space_filter;
@ -208,8 +191,6 @@ struct AddressSpace {
char *name;
MemoryRegion *root;
struct FlatView *current_map;
int ioeventfd_nb;
struct MemoryRegionIoeventfd *ioeventfds;
struct AddressSpaceDispatch *dispatch;
struct AddressSpaceDispatch *next_dispatch;
MemoryListener dispatch_listener;
@ -567,60 +548,6 @@ void memory_region_set_readonly(MemoryRegion *mr, bool readonly);
*/
void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode);
/**
* memory_region_clear_coalescing: Disable MMIO coalescing for the region.
*
* Disables any coalescing caused by memory_region_set_coalescing() or
* memory_region_add_coalescing(). Roughly equivalent to uncacheble memory
* hardware.
*
* @mr: the memory region to be updated.
*/
void memory_region_clear_coalescing(MemoryRegion *mr);
/**
* memory_region_add_eventfd: Request an eventfd to be triggered when a word
* is written to a location.
*
* Marks a word in an IO region (initialized with memory_region_init_io())
* as a trigger for an eventfd event. The I/O callback will not be called.
* The caller must be prepared to handle failure (that is, take the required
* action if the callback _is_ called).
*
* @mr: the memory region being updated.
* @addr: the address within @mr that is to be monitored
* @size: the size of the access to trigger the eventfd
* @match_data: whether to match against @data, instead of just @addr
* @data: the data to match against the guest write
* @fd: the eventfd to be triggered when @addr, @size, and @data all match.
**/
void memory_region_add_eventfd(MemoryRegion *mr,
hwaddr addr,
unsigned size,
bool match_data,
uint64_t data,
EventNotifier *e);
/**
* memory_region_del_eventfd: Cancel an eventfd.
*
* Cancels an eventfd trigger requested by a previous
* memory_region_add_eventfd() call.
*
* @mr: the memory region being updated.
* @addr: the address within @mr that is to be monitored
* @size: the size of the access to trigger the eventfd
* @match_data: whether to match against @data, instead of just @addr
* @data: the data to match against the guest write
* @fd: the eventfd to be triggered when @addr, @size, and @data all match.
*/
void memory_region_del_eventfd(MemoryRegion *mr,
hwaddr addr,
unsigned size,
bool match_data,
uint64_t data,
EventNotifier *e);
/**
* memory_region_add_subregion: Add a subregion to a container.
*

View File

@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_m68k
#define add_qemu_ldst_label add_qemu_ldst_label_m68k
#define address_space_access_valid address_space_access_valid_m68k
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_m68k
#define address_space_destroy address_space_destroy_m68k
#define address_space_destroy_dispatch address_space_destroy_dispatch_m68k
#define address_space_get_flatview address_space_get_flatview_m68k
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_m68k
#define address_space_translate_internal address_space_translate_internal_m68k
#define address_space_unmap address_space_unmap_m68k
#define address_space_update_ioeventfds address_space_update_ioeventfds_m68k
#define address_space_update_topology address_space_update_topology_m68k
#define address_space_update_topology_pass address_space_update_topology_pass_m68k
#define address_space_write address_space_write_m68k
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_m68k
#define addrrange_intersects addrrange_intersects_m68k
#define addrrange_make addrrange_make_m68k
#define addrrange_shift addrrange_shift_m68k
#define adjust_endianness adjust_endianness_m68k
#define all_helpers all_helpers_m68k
#define alloc_code_gen_buffer alloc_code_gen_buffer_m68k
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_m68k
#define memory_mapping_list_init memory_mapping_list_init_m68k
#define memory_region_access_valid memory_region_access_valid_m68k
#define memory_region_add_eventfd memory_region_add_eventfd_m68k
#define memory_region_add_subregion memory_region_add_subregion_m68k
#define memory_region_add_subregion_common memory_region_add_subregion_common_m68k
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_m68k
#define memory_region_big_endian memory_region_big_endian_m68k
#define memory_region_clear_coalescing memory_region_clear_coalescing_m68k
#define memory_region_clear_pending memory_region_clear_pending_m68k
#define memory_region_del_eventfd memory_region_del_eventfd_m68k
#define memory_region_del_subregion memory_region_del_subregion_m68k
#define memory_region_destructor_alias memory_region_destructor_alias_m68k
#define memory_region_destructor_none memory_region_destructor_none_m68k
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_m68k
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_m68k
#define memory_region_init_reservation memory_region_init_reservation_m68k
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_m68k
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_m68k
#define memory_region_is_iommu memory_region_is_iommu_m68k
#define memory_region_is_logging memory_region_is_logging_m68k
#define memory_region_is_mapped memory_region_is_mapped_m68k
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_m68k
#define memory_region_transaction_commit memory_region_transaction_commit_m68k
#define memory_region_unref memory_region_unref_m68k
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_m68k
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_m68k
#define memory_region_update_container_subregions memory_region_update_container_subregions_m68k
#define memory_region_write_accessor memory_region_write_accessor_m68k
#define memory_region_wrong_endianness memory_region_wrong_endianness_m68k

View File

@ -92,7 +92,6 @@ void memory_unmap(struct uc_struct *uc, MemoryRegion *mr)
obj = OBJECT(mr);
obj->ref = 1;
obj->free = g_free;
g_free(mr->ioeventfds);
g_free((char *)mr->name);
mr->name = NULL;
object_property_del_child(mr->uc, qdev_get_machine(mr->uc), obj, &error_abort);
@ -115,7 +114,6 @@ int memory_free(struct uc_struct *uc)
obj = OBJECT(mr);
obj->ref = 1;
obj->free = g_free;
g_free(mr->ioeventfds);
object_property_del_child(mr->uc, qdev_get_machine(mr->uc), obj, &error_abort);
}
@ -155,12 +153,6 @@ static Int128 addrrange_end(AddrRange r)
return int128_add(r.start, r.size);
}
static AddrRange addrrange_shift(AddrRange range, Int128 delta)
{
int128_addto(&range.start, delta);
return range;
}
static bool addrrange_contains(AddrRange range, Int128 addr)
{
return int128_ge(addr, range.start)
@ -258,65 +250,6 @@ static bool memory_listener_match(MemoryListener *listener,
}))
*/
struct CoalescedMemoryRange {
AddrRange addr;
QTAILQ_ENTRY(CoalescedMemoryRange) link;
};
struct MemoryRegionIoeventfd {
AddrRange addr;
bool match_data;
uint64_t data;
EventNotifier *e;
};
static MemoryRegionIoeventfd MemoryRegionIoeventfd_make(AddrRange addr, bool match_data, uint64_t data, EventNotifier *e)
{
MemoryRegionIoeventfd mrfd;
mrfd.addr = addr;
mrfd.match_data = match_data;
mrfd.data = data;
mrfd.e = e;
return mrfd;
}
static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
MemoryRegionIoeventfd b)
{
if (int128_lt(a.addr.start, b.addr.start)) {
return true;
} else if (int128_gt(a.addr.start, b.addr.start)) {
return false;
} else if (int128_lt(a.addr.size, b.addr.size)) {
return true;
} else if (int128_gt(a.addr.size, b.addr.size)) {
return false;
} else if (a.match_data < b.match_data) {
return true;
} else if (a.match_data > b.match_data) {
return false;
} else if (a.match_data) {
if (a.data < b.data) {
return true;
} else if (a.data > b.data) {
return false;
}
}
if (a.e < b.e) {
return true;
} else if (a.e > b.e) {
return false;
}
return false;
}
static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
MemoryRegionIoeventfd b)
{
return !memory_region_ioeventfd_before(a, b)
&& !memory_region_ioeventfd_before(b, a);
}
typedef struct FlatRange FlatRange;
typedef struct FlatView FlatView;
@ -683,48 +616,6 @@ static FlatView *generate_memory_topology(MemoryRegion *mr)
return view;
}
static void address_space_add_del_ioeventfds(AddressSpace *as,
MemoryRegionIoeventfd *fds_new,
unsigned fds_new_nb,
MemoryRegionIoeventfd *fds_old,
unsigned fds_old_nb)
{
unsigned iold, inew;
MemoryRegionIoeventfd *fd;
MemoryRegionSection section;
struct uc_struct *uc = as->uc;
/* Generate a symmetric difference of the old and new fd sets, adding
* and deleting as necessary.
*/
iold = inew = 0;
while (iold < fds_old_nb || inew < fds_new_nb) {
if (iold < fds_old_nb
&& (inew == fds_new_nb
|| memory_region_ioeventfd_before(fds_old[iold],
fds_new[inew]))) {
fd = &fds_old[iold];
section = MemoryRegionSection_make(NULL, as, 0, fd->addr.size, int128_get64(fd->addr.start), false);
MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
fd->match_data, fd->data, fd->e);
++iold;
} else if (inew < fds_new_nb
&& (iold == fds_old_nb
|| memory_region_ioeventfd_before(fds_new[inew],
fds_old[iold]))) {
fd = &fds_new[inew];
section = MemoryRegionSection_make(NULL, as, 0, fd->addr.size, int128_get64(fd->addr.start), false);
MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
fd->match_data, fd->data, fd->e);
++inew;
} else {
++iold;
++inew;
}
}
}
static FlatView *address_space_get_flatview(AddressSpace *as)
{
FlatView *view;
@ -734,40 +625,6 @@ static FlatView *address_space_get_flatview(AddressSpace *as)
return view;
}
static void address_space_update_ioeventfds(AddressSpace *as)
{
FlatView *view;
FlatRange *fr;
unsigned ioeventfd_nb = 0;
MemoryRegionIoeventfd *ioeventfds = NULL;
AddrRange tmp;
unsigned i;
view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
int128_sub(fr->addr.start,
int128_make64(fr->offset_in_region)));
if (addrrange_intersects(fr->addr, tmp)) {
++ioeventfd_nb;
ioeventfds = g_realloc(ioeventfds,
ioeventfd_nb * sizeof(*ioeventfds));
ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
ioeventfds[ioeventfd_nb-1].addr = tmp;
}
}
}
address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
as->ioeventfds, as->ioeventfd_nb);
g_free(as->ioeventfds);
as->ioeventfds = ioeventfds;
as->ioeventfd_nb = ioeventfd_nb;
flatview_unref(view);
}
static void address_space_update_topology_pass(AddressSpace *as,
const FlatView *old_view,
const FlatView *new_view,
@ -850,8 +707,6 @@ static void address_space_update_topology(AddressSpace *as)
* counting is necessary.
*/
flatview_unref(old_view);
address_space_update_ioeventfds(as);
}
void memory_region_transaction_begin(struct uc_struct *uc)
@ -862,7 +717,6 @@ void memory_region_transaction_begin(struct uc_struct *uc)
static void memory_region_clear_pending(struct uc_struct *uc)
{
uc->memory_region_update_pending = false;
uc->ioeventfd_update_pending = false;
}
void memory_region_transaction_commit(struct uc_struct *uc)
@ -880,10 +734,6 @@ void memory_region_transaction_commit(struct uc_struct *uc)
}
MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
} else if (uc->ioeventfd_update_pending) {
QTAILQ_FOREACH(as, &uc->address_spaces, address_spaces_link) {
address_space_update_ioeventfds(as);
}
}
memory_region_clear_pending(uc);
}
@ -1037,7 +887,6 @@ static void memory_region_initfn(struct uc_struct *uc, Object *obj, void *opaque
mr->romd_mode = true;
mr->destructor = memory_region_destructor_none;
QTAILQ_INIT(&mr->subregions);
QTAILQ_INIT(&mr->coalesced);
op = object_property_add(OBJECT(mr), "container",
"link<" TYPE_MEMORY_REGION ">",
@ -1278,9 +1127,7 @@ static void memory_region_finalize(struct uc_struct *uc, Object *obj, void *opaq
assert(QTAILQ_EMPTY(&mr->subregions));
// assert(memory_region_transaction_depth == 0);
mr->destructor(mr);
memory_region_clear_coalescing(mr);
g_free((char *)mr->name);
g_free(mr->ioeventfds);
}
void memory_region_ref(MemoryRegion *mr)
@ -1403,126 +1250,6 @@ void *memory_region_get_ram_ptr(MemoryRegion *mr)
return qemu_get_ram_ptr(mr->uc, mr->ram_addr & TARGET_PAGE_MASK);
}
static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
{
FlatView *view;
FlatRange *fr;
CoalescedMemoryRange *cmr;
AddrRange tmp;
MemoryRegionSection section;
struct uc_struct *uc = mr->uc;
view = address_space_get_flatview(as);
FOR_EACH_FLAT_RANGE(fr, view) {
if (fr->mr == mr) {
section = MemoryRegionSection_make(NULL, as, 0, fr->addr.size, int128_get64(fr->addr.start), false);
MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
int128_get64(fr->addr.start),
int128_get64(fr->addr.size));
QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
tmp = addrrange_shift(cmr->addr,
int128_sub(fr->addr.start,
int128_make64(fr->offset_in_region)));
if (!addrrange_intersects(tmp, fr->addr)) {
continue;
}
tmp = addrrange_intersection(tmp, fr->addr);
MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
int128_get64(tmp.start),
int128_get64(tmp.size));
}
}
}
flatview_unref(view);
}
static void memory_region_update_coalesced_range(MemoryRegion *mr)
{
AddressSpace *as;
QTAILQ_FOREACH(as, &mr->uc->address_spaces, address_spaces_link) {
memory_region_update_coalesced_range_as(mr, as);
}
}
void memory_region_clear_coalescing(MemoryRegion *mr)
{
CoalescedMemoryRange *cmr;
bool updated = false;
mr->flush_coalesced_mmio = false;
while (!QTAILQ_EMPTY(&mr->coalesced)) {
cmr = QTAILQ_FIRST(&mr->coalesced);
QTAILQ_REMOVE(&mr->coalesced, cmr, link);
g_free(cmr);
updated = true;
}
if (updated) {
memory_region_update_coalesced_range(mr);
}
}
void memory_region_add_eventfd(MemoryRegion *mr,
hwaddr addr,
unsigned size,
bool match_data,
uint64_t data,
EventNotifier *e)
{
MemoryRegionIoeventfd mrfd = MemoryRegionIoeventfd_make(
addrrange_make(int128_make64(addr), int128_make64(size)),
match_data, data, e);
unsigned i;
adjust_endianness(mr, &mrfd.data, size);
memory_region_transaction_begin(mr->uc);
for (i = 0; i < mr->ioeventfd_nb; ++i) {
if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
break;
}
}
++mr->ioeventfd_nb;
mr->ioeventfds = g_realloc(mr->ioeventfds,
sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
mr->ioeventfds[i] = mrfd;
mr->uc->ioeventfd_update_pending |= mr->enabled;
memory_region_transaction_commit(mr->uc);
}
void memory_region_del_eventfd(MemoryRegion *mr,
hwaddr addr,
unsigned size,
bool match_data,
uint64_t data,
EventNotifier *e)
{
MemoryRegionIoeventfd mrfd = MemoryRegionIoeventfd_make(
addrrange_make(int128_make64(addr), int128_make64(size)),
match_data, data, e);
unsigned i;
adjust_endianness(mr, &mrfd.data, size);
memory_region_transaction_begin(mr->uc);
for (i = 0; i < mr->ioeventfd_nb; ++i) {
if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
break;
}
}
assert(i != mr->ioeventfd_nb);
memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
--mr->ioeventfd_nb;
mr->ioeventfds = g_realloc(mr->ioeventfds,
sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
mr->uc->ioeventfd_update_pending |= mr->enabled;
memory_region_transaction_commit(mr->uc);
}
static void memory_region_update_container_subregions(MemoryRegion *subregion)
{
hwaddr offset = subregion->addr;
@ -1820,8 +1547,6 @@ void address_space_init(struct uc_struct *uc, AddressSpace *as, MemoryRegion *ro
as->root = root;
as->current_map = g_new(FlatView, 1);
flatview_init(as->current_map);
as->ioeventfd_nb = 0;
as->ioeventfds = NULL;
QTAILQ_INSERT_TAIL(&uc->address_spaces, as, address_spaces_link);
as->name = g_strdup(name ? name : "anonymous");
address_space_init_dispatch(as);
@ -1849,7 +1574,6 @@ void address_space_destroy(AddressSpace *as)
flatview_unref(as->current_map);
g_free(as->name);
g_free(as->ioeventfds);
}
bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)

View File

@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_mips
#define add_qemu_ldst_label add_qemu_ldst_label_mips
#define address_space_access_valid address_space_access_valid_mips
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_mips
#define address_space_destroy address_space_destroy_mips
#define address_space_destroy_dispatch address_space_destroy_dispatch_mips
#define address_space_get_flatview address_space_get_flatview_mips
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips
#define address_space_translate_internal address_space_translate_internal_mips
#define address_space_unmap address_space_unmap_mips
#define address_space_update_ioeventfds address_space_update_ioeventfds_mips
#define address_space_update_topology address_space_update_topology_mips
#define address_space_update_topology_pass address_space_update_topology_pass_mips
#define address_space_write address_space_write_mips
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_mips
#define addrrange_intersects addrrange_intersects_mips
#define addrrange_make addrrange_make_mips
#define addrrange_shift addrrange_shift_mips
#define adjust_endianness adjust_endianness_mips
#define all_helpers all_helpers_mips
#define alloc_code_gen_buffer alloc_code_gen_buffer_mips
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_mips
#define memory_mapping_list_init memory_mapping_list_init_mips
#define memory_region_access_valid memory_region_access_valid_mips
#define memory_region_add_eventfd memory_region_add_eventfd_mips
#define memory_region_add_subregion memory_region_add_subregion_mips
#define memory_region_add_subregion_common memory_region_add_subregion_common_mips
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_mips
#define memory_region_big_endian memory_region_big_endian_mips
#define memory_region_clear_coalescing memory_region_clear_coalescing_mips
#define memory_region_clear_pending memory_region_clear_pending_mips
#define memory_region_del_eventfd memory_region_del_eventfd_mips
#define memory_region_del_subregion memory_region_del_subregion_mips
#define memory_region_destructor_alias memory_region_destructor_alias_mips
#define memory_region_destructor_none memory_region_destructor_none_mips
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_mips
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_mips
#define memory_region_init_reservation memory_region_init_reservation_mips
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_mips
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_mips
#define memory_region_is_iommu memory_region_is_iommu_mips
#define memory_region_is_logging memory_region_is_logging_mips
#define memory_region_is_mapped memory_region_is_mapped_mips
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_mips
#define memory_region_transaction_commit memory_region_transaction_commit_mips
#define memory_region_unref memory_region_unref_mips
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_mips
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_mips
#define memory_region_update_container_subregions memory_region_update_container_subregions_mips
#define memory_region_write_accessor memory_region_write_accessor_mips
#define memory_region_wrong_endianness memory_region_wrong_endianness_mips

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_mips64
#define add_qemu_ldst_label add_qemu_ldst_label_mips64
#define address_space_access_valid address_space_access_valid_mips64
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_mips64
#define address_space_destroy address_space_destroy_mips64
#define address_space_destroy_dispatch address_space_destroy_dispatch_mips64
#define address_space_get_flatview address_space_get_flatview_mips64
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64
#define address_space_translate_internal address_space_translate_internal_mips64
#define address_space_unmap address_space_unmap_mips64
#define address_space_update_ioeventfds address_space_update_ioeventfds_mips64
#define address_space_update_topology address_space_update_topology_mips64
#define address_space_update_topology_pass address_space_update_topology_pass_mips64
#define address_space_write address_space_write_mips64
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_mips64
#define addrrange_intersects addrrange_intersects_mips64
#define addrrange_make addrrange_make_mips64
#define addrrange_shift addrrange_shift_mips64
#define adjust_endianness adjust_endianness_mips64
#define all_helpers all_helpers_mips64
#define alloc_code_gen_buffer alloc_code_gen_buffer_mips64
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_mips64
#define memory_mapping_list_init memory_mapping_list_init_mips64
#define memory_region_access_valid memory_region_access_valid_mips64
#define memory_region_add_eventfd memory_region_add_eventfd_mips64
#define memory_region_add_subregion memory_region_add_subregion_mips64
#define memory_region_add_subregion_common memory_region_add_subregion_common_mips64
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_mips64
#define memory_region_big_endian memory_region_big_endian_mips64
#define memory_region_clear_coalescing memory_region_clear_coalescing_mips64
#define memory_region_clear_pending memory_region_clear_pending_mips64
#define memory_region_del_eventfd memory_region_del_eventfd_mips64
#define memory_region_del_subregion memory_region_del_subregion_mips64
#define memory_region_destructor_alias memory_region_destructor_alias_mips64
#define memory_region_destructor_none memory_region_destructor_none_mips64
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_mips64
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_mips64
#define memory_region_init_reservation memory_region_init_reservation_mips64
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_mips64
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_mips64
#define memory_region_is_iommu memory_region_is_iommu_mips64
#define memory_region_is_logging memory_region_is_logging_mips64
#define memory_region_is_mapped memory_region_is_mapped_mips64
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_mips64
#define memory_region_transaction_commit memory_region_transaction_commit_mips64
#define memory_region_unref memory_region_unref_mips64
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_mips64
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_mips64
#define memory_region_update_container_subregions memory_region_update_container_subregions_mips64
#define memory_region_write_accessor memory_region_write_accessor_mips64
#define memory_region_wrong_endianness memory_region_wrong_endianness_mips64

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_mips64el
#define add_qemu_ldst_label add_qemu_ldst_label_mips64el
#define address_space_access_valid address_space_access_valid_mips64el
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_mips64el
#define address_space_destroy address_space_destroy_mips64el
#define address_space_destroy_dispatch address_space_destroy_dispatch_mips64el
#define address_space_get_flatview address_space_get_flatview_mips64el
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64el
#define address_space_translate_internal address_space_translate_internal_mips64el
#define address_space_unmap address_space_unmap_mips64el
#define address_space_update_ioeventfds address_space_update_ioeventfds_mips64el
#define address_space_update_topology address_space_update_topology_mips64el
#define address_space_update_topology_pass address_space_update_topology_pass_mips64el
#define address_space_write address_space_write_mips64el
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_mips64el
#define addrrange_intersects addrrange_intersects_mips64el
#define addrrange_make addrrange_make_mips64el
#define addrrange_shift addrrange_shift_mips64el
#define adjust_endianness adjust_endianness_mips64el
#define all_helpers all_helpers_mips64el
#define alloc_code_gen_buffer alloc_code_gen_buffer_mips64el
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_mips64el
#define memory_mapping_list_init memory_mapping_list_init_mips64el
#define memory_region_access_valid memory_region_access_valid_mips64el
#define memory_region_add_eventfd memory_region_add_eventfd_mips64el
#define memory_region_add_subregion memory_region_add_subregion_mips64el
#define memory_region_add_subregion_common memory_region_add_subregion_common_mips64el
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_mips64el
#define memory_region_big_endian memory_region_big_endian_mips64el
#define memory_region_clear_coalescing memory_region_clear_coalescing_mips64el
#define memory_region_clear_pending memory_region_clear_pending_mips64el
#define memory_region_del_eventfd memory_region_del_eventfd_mips64el
#define memory_region_del_subregion memory_region_del_subregion_mips64el
#define memory_region_destructor_alias memory_region_destructor_alias_mips64el
#define memory_region_destructor_none memory_region_destructor_none_mips64el
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_mips64el
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_mips64el
#define memory_region_init_reservation memory_region_init_reservation_mips64el
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_mips64el
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_mips64el
#define memory_region_is_iommu memory_region_is_iommu_mips64el
#define memory_region_is_logging memory_region_is_logging_mips64el
#define memory_region_is_mapped memory_region_is_mapped_mips64el
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_mips64el
#define memory_region_transaction_commit memory_region_transaction_commit_mips64el
#define memory_region_unref memory_region_unref_mips64el
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_mips64el
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_mips64el
#define memory_region_update_container_subregions memory_region_update_container_subregions_mips64el
#define memory_region_write_accessor memory_region_write_accessor_mips64el
#define memory_region_wrong_endianness memory_region_wrong_endianness_mips64el

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_mipsel
#define add_qemu_ldst_label add_qemu_ldst_label_mipsel
#define address_space_access_valid address_space_access_valid_mipsel
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_mipsel
#define address_space_destroy address_space_destroy_mipsel
#define address_space_destroy_dispatch address_space_destroy_dispatch_mipsel
#define address_space_get_flatview address_space_get_flatview_mipsel
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mipsel
#define address_space_translate_internal address_space_translate_internal_mipsel
#define address_space_unmap address_space_unmap_mipsel
#define address_space_update_ioeventfds address_space_update_ioeventfds_mipsel
#define address_space_update_topology address_space_update_topology_mipsel
#define address_space_update_topology_pass address_space_update_topology_pass_mipsel
#define address_space_write address_space_write_mipsel
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_mipsel
#define addrrange_intersects addrrange_intersects_mipsel
#define addrrange_make addrrange_make_mipsel
#define addrrange_shift addrrange_shift_mipsel
#define adjust_endianness adjust_endianness_mipsel
#define all_helpers all_helpers_mipsel
#define alloc_code_gen_buffer alloc_code_gen_buffer_mipsel
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_mipsel
#define memory_mapping_list_init memory_mapping_list_init_mipsel
#define memory_region_access_valid memory_region_access_valid_mipsel
#define memory_region_add_eventfd memory_region_add_eventfd_mipsel
#define memory_region_add_subregion memory_region_add_subregion_mipsel
#define memory_region_add_subregion_common memory_region_add_subregion_common_mipsel
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_mipsel
#define memory_region_big_endian memory_region_big_endian_mipsel
#define memory_region_clear_coalescing memory_region_clear_coalescing_mipsel
#define memory_region_clear_pending memory_region_clear_pending_mipsel
#define memory_region_del_eventfd memory_region_del_eventfd_mipsel
#define memory_region_del_subregion memory_region_del_subregion_mipsel
#define memory_region_destructor_alias memory_region_destructor_alias_mipsel
#define memory_region_destructor_none memory_region_destructor_none_mipsel
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_mipsel
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_mipsel
#define memory_region_init_reservation memory_region_init_reservation_mipsel
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_mipsel
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_mipsel
#define memory_region_is_iommu memory_region_is_iommu_mipsel
#define memory_region_is_logging memory_region_is_logging_mipsel
#define memory_region_is_mapped memory_region_is_mapped_mipsel
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_mipsel
#define memory_region_transaction_commit memory_region_transaction_commit_mipsel
#define memory_region_unref memory_region_unref_mipsel
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_mipsel
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_mipsel
#define memory_region_update_container_subregions memory_region_update_container_subregions_mipsel
#define memory_region_write_accessor memory_region_write_accessor_mipsel
#define memory_region_wrong_endianness memory_region_wrong_endianness_mipsel

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_powerpc
#define add_qemu_ldst_label add_qemu_ldst_label_powerpc
#define address_space_access_valid address_space_access_valid_powerpc
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_powerpc
#define address_space_destroy address_space_destroy_powerpc
#define address_space_destroy_dispatch address_space_destroy_dispatch_powerpc
#define address_space_get_flatview address_space_get_flatview_powerpc
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_powerpc
#define address_space_translate_internal address_space_translate_internal_powerpc
#define address_space_unmap address_space_unmap_powerpc
#define address_space_update_ioeventfds address_space_update_ioeventfds_powerpc
#define address_space_update_topology address_space_update_topology_powerpc
#define address_space_update_topology_pass address_space_update_topology_pass_powerpc
#define address_space_write address_space_write_powerpc
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_powerpc
#define addrrange_intersects addrrange_intersects_powerpc
#define addrrange_make addrrange_make_powerpc
#define addrrange_shift addrrange_shift_powerpc
#define adjust_endianness adjust_endianness_powerpc
#define all_helpers all_helpers_powerpc
#define alloc_code_gen_buffer alloc_code_gen_buffer_powerpc
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_powerpc
#define memory_mapping_list_init memory_mapping_list_init_powerpc
#define memory_region_access_valid memory_region_access_valid_powerpc
#define memory_region_add_eventfd memory_region_add_eventfd_powerpc
#define memory_region_add_subregion memory_region_add_subregion_powerpc
#define memory_region_add_subregion_common memory_region_add_subregion_common_powerpc
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_powerpc
#define memory_region_big_endian memory_region_big_endian_powerpc
#define memory_region_clear_coalescing memory_region_clear_coalescing_powerpc
#define memory_region_clear_pending memory_region_clear_pending_powerpc
#define memory_region_del_eventfd memory_region_del_eventfd_powerpc
#define memory_region_del_subregion memory_region_del_subregion_powerpc
#define memory_region_destructor_alias memory_region_destructor_alias_powerpc
#define memory_region_destructor_none memory_region_destructor_none_powerpc
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_powerpc
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_powerpc
#define memory_region_init_reservation memory_region_init_reservation_powerpc
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_powerpc
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_powerpc
#define memory_region_is_iommu memory_region_is_iommu_powerpc
#define memory_region_is_logging memory_region_is_logging_powerpc
#define memory_region_is_mapped memory_region_is_mapped_powerpc
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_powerpc
#define memory_region_transaction_commit memory_region_transaction_commit_powerpc
#define memory_region_unref memory_region_unref_powerpc
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_powerpc
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_powerpc
#define memory_region_update_container_subregions memory_region_update_container_subregions_powerpc
#define memory_region_write_accessor memory_region_write_accessor_powerpc
#define memory_region_wrong_endianness memory_region_wrong_endianness_powerpc

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_sparc
#define add_qemu_ldst_label add_qemu_ldst_label_sparc
#define address_space_access_valid address_space_access_valid_sparc
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_sparc
#define address_space_destroy address_space_destroy_sparc
#define address_space_destroy_dispatch address_space_destroy_dispatch_sparc
#define address_space_get_flatview address_space_get_flatview_sparc
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc
#define address_space_translate_internal address_space_translate_internal_sparc
#define address_space_unmap address_space_unmap_sparc
#define address_space_update_ioeventfds address_space_update_ioeventfds_sparc
#define address_space_update_topology address_space_update_topology_sparc
#define address_space_update_topology_pass address_space_update_topology_pass_sparc
#define address_space_write address_space_write_sparc
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_sparc
#define addrrange_intersects addrrange_intersects_sparc
#define addrrange_make addrrange_make_sparc
#define addrrange_shift addrrange_shift_sparc
#define adjust_endianness adjust_endianness_sparc
#define all_helpers all_helpers_sparc
#define alloc_code_gen_buffer alloc_code_gen_buffer_sparc
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_sparc
#define memory_mapping_list_init memory_mapping_list_init_sparc
#define memory_region_access_valid memory_region_access_valid_sparc
#define memory_region_add_eventfd memory_region_add_eventfd_sparc
#define memory_region_add_subregion memory_region_add_subregion_sparc
#define memory_region_add_subregion_common memory_region_add_subregion_common_sparc
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_sparc
#define memory_region_big_endian memory_region_big_endian_sparc
#define memory_region_clear_coalescing memory_region_clear_coalescing_sparc
#define memory_region_clear_pending memory_region_clear_pending_sparc
#define memory_region_del_eventfd memory_region_del_eventfd_sparc
#define memory_region_del_subregion memory_region_del_subregion_sparc
#define memory_region_destructor_alias memory_region_destructor_alias_sparc
#define memory_region_destructor_none memory_region_destructor_none_sparc
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_sparc
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_sparc
#define memory_region_init_reservation memory_region_init_reservation_sparc
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_sparc
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_sparc
#define memory_region_is_iommu memory_region_is_iommu_sparc
#define memory_region_is_logging memory_region_is_logging_sparc
#define memory_region_is_mapped memory_region_is_mapped_sparc
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_sparc
#define memory_region_transaction_commit memory_region_transaction_commit_sparc
#define memory_region_unref memory_region_unref_sparc
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_sparc
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_sparc
#define memory_region_update_container_subregions memory_region_update_container_subregions_sparc
#define memory_region_write_accessor memory_region_write_accessor_sparc
#define memory_region_wrong_endianness memory_region_wrong_endianness_sparc

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@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_sparc64
#define add_qemu_ldst_label add_qemu_ldst_label_sparc64
#define address_space_access_valid address_space_access_valid_sparc64
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_sparc64
#define address_space_destroy address_space_destroy_sparc64
#define address_space_destroy_dispatch address_space_destroy_dispatch_sparc64
#define address_space_get_flatview address_space_get_flatview_sparc64
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc64
#define address_space_translate_internal address_space_translate_internal_sparc64
#define address_space_unmap address_space_unmap_sparc64
#define address_space_update_ioeventfds address_space_update_ioeventfds_sparc64
#define address_space_update_topology address_space_update_topology_sparc64
#define address_space_update_topology_pass address_space_update_topology_pass_sparc64
#define address_space_write address_space_write_sparc64
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_sparc64
#define addrrange_intersects addrrange_intersects_sparc64
#define addrrange_make addrrange_make_sparc64
#define addrrange_shift addrrange_shift_sparc64
#define adjust_endianness adjust_endianness_sparc64
#define all_helpers all_helpers_sparc64
#define alloc_code_gen_buffer alloc_code_gen_buffer_sparc64
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_sparc64
#define memory_mapping_list_init memory_mapping_list_init_sparc64
#define memory_region_access_valid memory_region_access_valid_sparc64
#define memory_region_add_eventfd memory_region_add_eventfd_sparc64
#define memory_region_add_subregion memory_region_add_subregion_sparc64
#define memory_region_add_subregion_common memory_region_add_subregion_common_sparc64
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_sparc64
#define memory_region_big_endian memory_region_big_endian_sparc64
#define memory_region_clear_coalescing memory_region_clear_coalescing_sparc64
#define memory_region_clear_pending memory_region_clear_pending_sparc64
#define memory_region_del_eventfd memory_region_del_eventfd_sparc64
#define memory_region_del_subregion memory_region_del_subregion_sparc64
#define memory_region_destructor_alias memory_region_destructor_alias_sparc64
#define memory_region_destructor_none memory_region_destructor_none_sparc64
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_sparc64
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_sparc64
#define memory_region_init_reservation memory_region_init_reservation_sparc64
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_sparc64
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_sparc64
#define memory_region_is_iommu memory_region_is_iommu_sparc64
#define memory_region_is_logging memory_region_is_logging_sparc64
#define memory_region_is_mapped memory_region_is_mapped_sparc64
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_sparc64
#define memory_region_transaction_commit memory_region_transaction_commit_sparc64
#define memory_region_unref memory_region_unref_sparc64
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_sparc64
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_sparc64
#define memory_region_update_container_subregions memory_region_update_container_subregions_sparc64
#define memory_region_write_accessor memory_region_write_accessor_sparc64
#define memory_region_wrong_endianness memory_region_wrong_endianness_sparc64

View File

@ -5339,6 +5339,8 @@ static bool round_to_inf(float_status *fpst, bool sign_bit)
return sign_bit;
case float_round_to_zero: /* Round to Zero */
return false;
default:
break;
}
g_assert_not_reached();

View File

@ -79,6 +79,15 @@ int arm_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
case UC_ARM_REG_R15:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.regs[15];
break;
case UC_ARM_REG_C1_C0_2:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.c1_coproc;
break;
case UC_ARM_REG_C13_C0_3:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el0;
break;
case UC_ARM_REG_FPEXC:
*(int32_t *)value = ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC];
break;
}
}
}
@ -121,6 +130,16 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, i
uc->quit_request = true;
uc_emu_stop(uc);
break;
case UC_ARM_REG_C1_C0_2:
ARM_CPU(uc, mycpu)->env.cp15.c1_coproc = *(int32_t *)value;
break;
case UC_ARM_REG_C13_C0_3:
ARM_CPU(uc, mycpu)->env.cp15.tpidrro_el0 = *(int32_t *)value;
break;
case UC_ARM_REG_FPEXC:
ARM_CPU(uc, mycpu)->env.vfp.xregs[ARM_VFP_FPEXC] = *(int32_t *)value;
break;
}
}

View File

@ -11,6 +11,11 @@
#include <unicorn/x86.h> /* needed for uc_x86_mmr */
#include "uc_priv.h"
#define X86_NON_CS_FLAGS (DESC_P_MASK | DESC_S_MASK | DESC_W_MASK | DESC_A_MASK)
static void load_seg_16_helper(CPUX86State *env, int seg, uint32_t selector)
{
cpu_x86_load_seg_cache(env, seg, selector, (selector << 4), 0xffff, X86_NON_CS_FLAGS);
}
const int X86_REGS_STORAGE_SIZE = offsetof(CPUX86State, tlb_table);
@ -126,6 +131,18 @@ void x86_reg_reset(struct uc_struct *uc)
case UC_MODE_16:
env->hflags = 0;
env->cr[0] = 0;
//undo the damage done by the memset of env->segs above
//for R_CS, not quite the same as x86_cpu_reset
cpu_x86_load_seg_cache(env, R_CS, 0, 0, 0xffff,
DESC_P_MASK | DESC_S_MASK | DESC_CS_MASK |
DESC_R_MASK | DESC_A_MASK);
//remainder yields same state as x86_cpu_reset
load_seg_16_helper(env, R_DS, 0);
load_seg_16_helper(env, R_ES, 0);
load_seg_16_helper(env, R_SS, 0);
load_seg_16_helper(env, R_FS, 0);
load_seg_16_helper(env, R_GS, 0);
break;
case UC_MODE_32:
env->hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_OSFXSR_MASK;
@ -744,19 +761,19 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
switch(regid) {
default: break;
case UC_X86_REG_ES:
X86_CPU(uc, mycpu)->env.segs[R_ES].selector = *(uint16_t *)value;
load_seg_16_helper(&X86_CPU(uc, mycpu)->env, R_ES, *(uint16_t *)value);
continue;
case UC_X86_REG_SS:
X86_CPU(uc, mycpu)->env.segs[R_SS].selector = *(uint16_t *)value;
load_seg_16_helper(&X86_CPU(uc, mycpu)->env, R_SS, *(uint16_t *)value);
continue;
case UC_X86_REG_DS:
X86_CPU(uc, mycpu)->env.segs[R_DS].selector = *(uint16_t *)value;
load_seg_16_helper(&X86_CPU(uc, mycpu)->env, R_DS, *(uint16_t *)value);
continue;
case UC_X86_REG_FS:
X86_CPU(uc, mycpu)->env.segs[R_FS].selector = *(uint16_t *)value;
load_seg_16_helper(&X86_CPU(uc, mycpu)->env, R_FS, *(uint16_t *)value);
continue;
case UC_X86_REG_GS:
X86_CPU(uc, mycpu)->env.segs[R_GS].selector = *(uint16_t *)value;
load_seg_16_helper(&X86_CPU(uc, mycpu)->env, R_GS, *(uint16_t *)value);
continue;
}
// fall-thru

View File

@ -429,6 +429,8 @@ static inline int opsize_bytes(int opsize)
g_assert_not_reached();
return 0;
}
return 0;
}
/* Assign value to a register. If the width is less than the register width

View File

@ -56,7 +56,6 @@
#define addFloatx80Sigs addFloatx80Sigs_x86_64
#define add_qemu_ldst_label add_qemu_ldst_label_x86_64
#define address_space_access_valid address_space_access_valid_x86_64
#define address_space_add_del_ioeventfds address_space_add_del_ioeventfds_x86_64
#define address_space_destroy address_space_destroy_x86_64
#define address_space_destroy_dispatch address_space_destroy_dispatch_x86_64
#define address_space_get_flatview address_space_get_flatview_x86_64
@ -70,7 +69,6 @@
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_x86_64
#define address_space_translate_internal address_space_translate_internal_x86_64
#define address_space_unmap address_space_unmap_x86_64
#define address_space_update_ioeventfds address_space_update_ioeventfds_x86_64
#define address_space_update_topology address_space_update_topology_x86_64
#define address_space_update_topology_pass address_space_update_topology_pass_x86_64
#define address_space_write address_space_write_x86_64
@ -80,7 +78,6 @@
#define addrrange_intersection addrrange_intersection_x86_64
#define addrrange_intersects addrrange_intersects_x86_64
#define addrrange_make addrrange_make_x86_64
#define addrrange_shift addrrange_shift_x86_64
#define adjust_endianness adjust_endianness_x86_64
#define all_helpers all_helpers_x86_64
#define alloc_code_gen_buffer alloc_code_gen_buffer_x86_64
@ -2011,14 +2008,11 @@
#define memory_mapping_list_free memory_mapping_list_free_x86_64
#define memory_mapping_list_init memory_mapping_list_init_x86_64
#define memory_region_access_valid memory_region_access_valid_x86_64
#define memory_region_add_eventfd memory_region_add_eventfd_x86_64
#define memory_region_add_subregion memory_region_add_subregion_x86_64
#define memory_region_add_subregion_common memory_region_add_subregion_common_x86_64
#define memory_region_add_subregion_overlap memory_region_add_subregion_overlap_x86_64
#define memory_region_big_endian memory_region_big_endian_x86_64
#define memory_region_clear_coalescing memory_region_clear_coalescing_x86_64
#define memory_region_clear_pending memory_region_clear_pending_x86_64
#define memory_region_del_eventfd memory_region_del_eventfd_x86_64
#define memory_region_del_subregion memory_region_del_subregion_x86_64
#define memory_region_destructor_alias memory_region_destructor_alias_x86_64
#define memory_region_destructor_none memory_region_destructor_none_x86_64
@ -2047,8 +2041,6 @@
#define memory_region_init_ram memory_region_init_ram_x86_64
#define memory_region_init_ram_ptr memory_region_init_ram_ptr_x86_64
#define memory_region_init_reservation memory_region_init_reservation_x86_64
#define memory_region_ioeventfd_before memory_region_ioeventfd_before_x86_64
#define memory_region_ioeventfd_equal memory_region_ioeventfd_equal_x86_64
#define memory_region_is_iommu memory_region_is_iommu_x86_64
#define memory_region_is_logging memory_region_is_logging_x86_64
#define memory_region_is_mapped memory_region_is_mapped_x86_64
@ -2078,8 +2070,6 @@
#define memory_region_transaction_begin memory_region_transaction_begin_x86_64
#define memory_region_transaction_commit memory_region_transaction_commit_x86_64
#define memory_region_unref memory_region_unref_x86_64
#define memory_region_update_coalesced_range memory_region_update_coalesced_range_x86_64
#define memory_region_update_coalesced_range_as memory_region_update_coalesced_range_as_x86_64
#define memory_region_update_container_subregions memory_region_update_container_subregions_x86_64
#define memory_region_write_accessor memory_region_write_accessor_x86_64
#define memory_region_wrong_endianness memory_region_wrong_endianness_x86_64

View File

@ -0,0 +1,65 @@
#include <unicorn/unicorn.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#define ADDRESS 0x1000
#define ARM_VMOV "\xC0\xEF\x10\x00" // VMOV.I32 D16, #0 ; Vector Move
int main()
{
uc_engine *uc;
uc_err err;
err = uc_open(UC_ARCH_ARM, UC_MODE_ARM, &uc);
if (err) {
printf("uc_open %d\n", err);
return 1;
}
uint64_t tmp_val;
err = uc_reg_read(uc, UC_ARM_REG_C1_C0_2, &tmp_val);
if (err) {
printf("uc_open %d\n", err);
return 1;
}
tmp_val = tmp_val | (0xf << 20);
err = uc_reg_write(uc, UC_ARM_REG_C1_C0_2, &tmp_val);
if (err) {
printf("uc_open %d\n", err);
return 1;
}
size_t enable_vfp = 0x40000000;
err = uc_reg_write(uc, UC_ARM_REG_FPEXC, &enable_vfp);
if (err) {
printf("uc_open %d\n", err);
return 1;
}
err = uc_mem_map(uc, ADDRESS, 4 * 1024, UC_PROT_ALL);
if (err) {
printf("uc_mem_map %d\n", err);
return 1;
}
err = uc_mem_write(uc, ADDRESS, ARM_VMOV, sizeof(ARM_VMOV) - 1);
if (err) {
printf("uc_mem_map %s\n", uc_strerror(err));
return 1;
}
err = uc_emu_start(uc, ADDRESS, 0, 0, 1);
if (err) {
printf("uc_emu_start: %s\n", uc_strerror(err));
return 1;
}
printf("Success\n");
uc_close(uc);
return 0;
}

21
uc.c
View File

@ -130,7 +130,6 @@ bool uc_arch_supported(uc_arch arch)
#ifdef UNICORN_HAS_X86
case UC_ARCH_X86: return true;
#endif
/* Invalid or disabled arch */
default: return false;
}
@ -535,11 +534,12 @@ uc_err uc_emu_start(uc_engine* uc, uint64_t begin, uint64_t until, uint64_t time
switch(uc->arch) {
default:
break;
#ifdef UNICORN_HAS_M68K
case UC_ARCH_M68K:
uc_reg_write(uc, UC_M68K_REG_PC, &begin);
break;
#endif
#ifdef UNICORN_HAS_X86
case UC_ARCH_X86:
switch(uc->mode) {
default:
@ -555,24 +555,29 @@ uc_err uc_emu_start(uc_engine* uc, uint64_t begin, uint64_t until, uint64_t time
break;
}
break;
#endif
#ifdef UNICORN_HAS_ARM
case UC_ARCH_ARM:
uc_reg_write(uc, UC_ARM_REG_R15, &begin);
break;
#endif
#ifdef UNICORN_HAS_ARM64
case UC_ARCH_ARM64:
uc_reg_write(uc, UC_ARM64_REG_PC, &begin);
break;
#endif
#ifdef UNICORN_HAS_MIPS
case UC_ARCH_MIPS:
// TODO: MIPS32/MIPS64/BIGENDIAN etc
uc_reg_write(uc, UC_MIPS_REG_PC, &begin);
break;
#endif
#ifdef UNICORN_HAS_SPARC
case UC_ARCH_SPARC:
// TODO: Sparc/Sparc64
uc_reg_write(uc, UC_SPARC_REG_PC, &begin);
break;
#endif
}
uc->stop_request = false;
@ -1138,8 +1143,10 @@ uc_err uc_query(uc_engine *uc, uc_query_type type, size_t *result)
}
switch(uc->arch) {
#ifdef UNICORN_HAS_ARM
case UC_ARCH_ARM:
return uc->query(uc, type, result);
#endif
default:
return UC_ERR_ARG;
}