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target/i386/seg_helper: Perform comparison pass against qemu

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Ensure formatting and code stay in sync where relevant
This commit is contained in:
Lioncash 2018-03-12 13:21:54 -04:00
parent a1910954cd
commit 73426a7e79
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 8 additions and 5 deletions
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11
qemu/target/i386/seg_helper.c
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@ -583,7 +583,7 @@ static int exception_has_error_code(int intno)
/* protected mode interrupt */
static void do_interrupt_protected(CPUX86State *env, int intno, int is_int,
int error_code, unsigned int next_eip,
int is_hw) // qq
int is_hw)
{
SegmentCache *dt;
target_ulong ptr, ssp;
@ -831,7 +831,7 @@ static inline target_ulong get_rsp_from_tss(CPUX86State *env, int level)
/* 64 bit interrupt */
static void do_interrupt64(CPUX86State *env, int intno, int is_int,
int error_code, target_ulong next_eip, int is_hw) // qq
int error_code, target_ulong next_eip, int is_hw)
{
SegmentCache *dt;
target_ulong ptr;
@ -1085,7 +1085,7 @@ void helper_sysret(CPUX86State *env, int dflag)
/* real mode interrupt */
static void do_interrupt_real(CPUX86State *env, int intno, int is_int,
int error_code, unsigned int next_eip) // qq
int error_code, unsigned int next_eip)
{
SegmentCache *dt;
target_ulong ptr, ssp;
@ -1146,7 +1146,6 @@ static void do_interrupt_user(CPUX86State *env, int intno, int is_int,
ptr = dt->base + (intno << shift);
e2 = cpu_ldl_kernel(env, ptr + 4);
dpl = (e2 >> DESC_DPL_SHIFT) & 3;
cpl = env->hflags & HF_CPL_MASK;
/* check privilege if software int */
@ -1321,10 +1320,14 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
if (interrupt_request & CPU_INTERRUPT_POLL) {
cs->interrupt_request &= ~CPU_INTERRUPT_POLL;
apic_poll_irq(cpu->apic_state);
/* Don't process multiple interrupt requests in a single call.
This is required to make icount-driven execution deterministic. */
return true;
}
#endif
if (interrupt_request & CPU_INTERRUPT_SIPI) {
do_cpu_sipi(cpu);
ret = true;
} else if (env->hflags2 & HF2_GIF_MASK) {
if ((interrupt_request & CPU_INTERRUPT_SMI) &&
!(env->hflags & HF_SMM_MASK)) {