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https://github.com/yuzu-emu/unicorn.git
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target-i386: Rewrite gen_enter inline
Use gen_lea_v_seg for centralized segment base knowledge. Unify code across 32- and 64-bit. Fix note about "must save state" before using the out-of-line helpers. Backports commit 743e398e2fbf2f7183bf7a53c9d011fabcaa1770 from qemu
This commit is contained in:
Richard Henderson
Lioncash
parent
302752df8b
commit
7dd4fcc621
@ -46,10 +46,6 @@ DEF_HELPER_FLAGS_3(set_dr, TCG_CALL_NO_WG, void, env, int, tl)
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DEF_HELPER_FLAGS_2(get_dr, TCG_CALL_NO_WG, tl, env, int)
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DEF_HELPER_2(invlpg, void, env, tl)
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DEF_HELPER_4(enter_level, void, env, int, int, tl)
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#ifdef TARGET_X86_64
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DEF_HELPER_4(enter64_level, void, env, int, int, tl)
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#endif
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DEF_HELPER_2(sysenter, void, env, int)
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DEF_HELPER_2(sysexit, void, env, int)
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#ifdef TARGET_X86_64
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@ -1376,80 +1376,6 @@ bool x86_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
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return ret;
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}
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void helper_enter_level(CPUX86State *env, int level, int data32,
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target_ulong t1)
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{
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target_ulong ssp;
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uint32_t esp_mask, esp, ebp;
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esp_mask = get_sp_mask(env->segs[R_SS].flags);
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ssp = env->segs[R_SS].base;
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ebp = env->regs[R_EBP];
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esp = env->regs[R_ESP];
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if (data32) {
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/* 32 bit */
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esp -= 4;
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while (--level) {
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esp -= 4;
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ebp -= 4;
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cpu_stl_data_ra(env, ssp + (esp & esp_mask),
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cpu_ldl_data_ra(env, ssp + (ebp & esp_mask),
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GETPC()),
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GETPC());
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}
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esp -= 4;
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cpu_stl_data_ra(env, ssp + (esp & esp_mask), t1, GETPC());
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} else {
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/* 16 bit */
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esp -= 2;
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while (--level) {
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esp -= 2;
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ebp -= 2;
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cpu_stw_data_ra(env, ssp + (esp & esp_mask),
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cpu_lduw_data_ra(env, ssp + (ebp & esp_mask),
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GETPC()),
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GETPC());
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}
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esp -= 2;
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cpu_stw_data_ra(env, ssp + (esp & esp_mask), t1, GETPC());
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}
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}
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#ifdef TARGET_X86_64
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void helper_enter64_level(CPUX86State *env, int level, int data64,
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target_ulong t1)
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{
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target_ulong esp, ebp;
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ebp = env->regs[R_EBP];
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esp = env->regs[R_ESP];
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if (data64) {
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/* 64 bit */
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esp -= 8;
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while (--level) {
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esp -= 8;
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ebp -= 8;
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cpu_stq_data_ra(env, esp, cpu_ldq_data_ra(env, ebp, GETPC()),
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GETPC());
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}
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esp -= 8;
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cpu_stq_data_ra(env, esp, t1, GETPC());
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} else {
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/* 16 bit */
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esp -= 2;
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while (--level) {
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esp -= 2;
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ebp -= 2;
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cpu_stw_data_ra(env, esp, cpu_lduw_data_ra(env, ebp, GETPC()),
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GETPC());
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}
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esp -= 2;
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cpu_stw_data_ra(env, esp, t1, GETPC());
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}
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}
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#endif
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void helper_lldt(CPUX86State *env, int selector)
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{
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SegmentCache *dt;
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@ -441,14 +441,6 @@ static inline void gen_op_mov_v_reg(TCGContext *s, TCGMemOp ot, TCGv t0, int reg
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}
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}
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static inline void gen_op_movl_A0_reg(TCGContext *s, int reg)
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{
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TCGv cpu_A0 = *(TCGv *)s->cpu_A0;
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TCGv **cpu_regs = (TCGv **)s->cpu_regs;
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tcg_gen_mov_tl(s, cpu_A0, *cpu_regs[reg]);
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}
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static inline void gen_op_addl_A0_im(TCGContext *s, int32_t val)
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{
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TCGv cpu_A0 = *(TCGv *)s->cpu_A0;
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@ -503,21 +495,6 @@ static inline void gen_op_add_reg_T0(TCGContext *s, TCGMemOp size, int reg)
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gen_op_mov_reg_v(s, size, reg, cpu_tmp0);
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}
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static inline void gen_op_addl_A0_seg(DisasContext *s, int reg)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGv cpu_A0 = *(TCGv *)tcg_ctx->cpu_A0;
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TCGv **cpu_seg_base = (TCGv **)tcg_ctx->cpu_seg_base;
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if (CODE64(s)) {
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tcg_gen_ext32u_tl(tcg_ctx, cpu_A0, cpu_A0);
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tcg_gen_add_tl(tcg_ctx, cpu_A0, cpu_A0, *cpu_seg_base[reg]);
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} else {
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tcg_gen_add_tl(tcg_ctx, cpu_A0, cpu_A0, *cpu_seg_base[reg]);
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tcg_gen_ext32u_tl(tcg_ctx, cpu_A0, cpu_A0);
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}
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}
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static inline void gen_op_ld_v(DisasContext *s, int idx, TCGv t0, TCGv a0)
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{
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if (HOOK_EXISTS(s->uc, UC_HOOK_MEM_READ))
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@ -2644,54 +2621,47 @@ static void gen_popa(DisasContext *s)
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static void gen_enter(DisasContext *s, int esp_addend, int level)
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{
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TCGMemOp ot = mo_pushpop(s, s->dflag);
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int opsize = 1 << ot;
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TCGMemOp d_ot = mo_pushpop(s, s->dflag);
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TCGMemOp a_ot = CODE64(s) ? MO_64 : s->ss32 ? MO_32 : MO_16;
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int size = 1 << d_ot;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGv cpu_A0 = *(TCGv *)tcg_ctx->cpu_A0;
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TCGv cpu_tmp0 = *(TCGv *)tcg_ctx->cpu_tmp0;
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TCGv **cpu_T = (TCGv **)tcg_ctx->cpu_T;
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TCGv **cpu_regs = (TCGv **)tcg_ctx->cpu_regs;
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level &= 0x1f;
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#ifdef TARGET_X86_64
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if (CODE64(s)) {
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gen_op_movl_A0_reg(tcg_ctx, R_ESP);
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gen_op_addq_A0_im(tcg_ctx, -opsize);
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tcg_gen_mov_tl(tcg_ctx, *cpu_T[1], cpu_A0);
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/* Push BP; compute FrameTemp into T1. */
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tcg_gen_subi_tl(tcg_ctx, *cpu_T[1], *cpu_regs[R_ESP], size);
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gen_lea_v_seg(s, a_ot, *cpu_T[1], R_SS, -1);
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gen_op_st_v(s, d_ot, *cpu_regs[R_EBP], cpu_A0);
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/* push bp */
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gen_op_mov_v_reg(tcg_ctx, MO_32, *cpu_T[0], R_EBP);
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gen_op_st_v(s, ot, *cpu_T[0], cpu_A0);
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if (level) {
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/* XXX: must save state */
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gen_helper_enter64_level(tcg_ctx, tcg_ctx->cpu_env, tcg_const_i32(tcg_ctx, level),
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tcg_const_i32(tcg_ctx, (ot == MO_64)),
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*cpu_T[1]);
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level &= 31;
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if (level != 0) {
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int i;
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/* Copy level-1 pointers from the previous frame. */
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for (i = 1; i < level; ++i) {
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tcg_gen_subi_tl(tcg_ctx, cpu_A0, *cpu_regs[R_EBP], size * i);
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gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
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gen_op_ld_v(s, d_ot, cpu_tmp0, cpu_A0);
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tcg_gen_subi_tl(tcg_ctx, cpu_A0, *cpu_T[1], size * i);
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gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
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gen_op_st_v(s, d_ot, cpu_tmp0, cpu_A0);
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}
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gen_op_mov_reg_v(tcg_ctx, ot, R_EBP, *cpu_T[1]);
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tcg_gen_addi_tl(tcg_ctx, *cpu_T[1], *cpu_T[1], -esp_addend + (-opsize * level));
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gen_op_mov_reg_v(tcg_ctx, MO_64, R_ESP, *cpu_T[1]);
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} else
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#endif
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{
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gen_op_movl_A0_reg(tcg_ctx, R_ESP);
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gen_op_addl_A0_im(tcg_ctx, -opsize);
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if (!s->ss32)
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tcg_gen_ext16u_tl(tcg_ctx, cpu_A0, cpu_A0);
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tcg_gen_mov_tl(tcg_ctx, *cpu_T[1], cpu_A0);
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if (s->addseg)
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gen_op_addl_A0_seg(s, R_SS);
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/* push bp */
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gen_op_mov_v_reg(tcg_ctx, MO_32, *cpu_T[0], R_EBP);
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gen_op_st_v(s, ot, *cpu_T[0], cpu_A0);
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if (level) {
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/* XXX: must save state */
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gen_helper_enter_level(tcg_ctx, tcg_ctx->cpu_env, tcg_const_i32(tcg_ctx, level),
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tcg_const_i32(tcg_ctx, s->dflag - 1),
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*cpu_T[1]);
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}
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gen_op_mov_reg_v(tcg_ctx, ot, R_EBP, *cpu_T[1]);
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tcg_gen_addi_tl(tcg_ctx, *cpu_T[1], *cpu_T[1], -esp_addend + (-opsize * level));
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gen_op_mov_reg_v(tcg_ctx, MO_16 + s->ss32, R_ESP, *cpu_T[1]);
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/* Push the current FrameTemp as the last level. */
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tcg_gen_subi_tl(tcg_ctx, cpu_A0, *cpu_T[1], size * level);
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gen_lea_v_seg(s, a_ot, cpu_A0, R_SS, -1);
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gen_op_st_v(s, d_ot, *cpu_T[1], cpu_A0);
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}
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/* Copy the FrameTemp value to EBP. */
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gen_op_mov_reg_v(tcg_ctx, a_ot, R_EBP, *cpu_T[1]);
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/* Compute the final value of ESP. */
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tcg_gen_subi_tl(tcg_ctx, *cpu_T[1], *cpu_T[1], esp_addend + size * level);
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gen_op_mov_reg_v(tcg_ctx, a_ot, R_ESP, *cpu_T[1]);
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}
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static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
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