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exec: introduce MemoryRegionCache

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Device models often have to perform multiple access to a single
memory region that is known in advance, but would to use "DMA-style"
functions instead of address_space_map/unmap. This can happen
for example when the data has to undergo endianness conversion.
Introduce a new data structure to cache the result of
address_space_translate without forcing usage of a host address
like address_space_map does.

Backports commit 1f4e496e1fc2eb6c8bf377a0f9695930c380bfd3 from qemu
This commit is contained in:
Paolo Bonzini 2018-03-01 10:10:15 -05:00 committed by Lioncash
parent 03a9bbb3d3
commit 81ad780e5e
No known key found for this signature in database
GPG Key ID: 4E3C3CC1031BA9C7
18 changed files with 933 additions and 0 deletions
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45
qemu/aarch64.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_aarch64
#define add_qemu_ldst_label add_qemu_ldst_label_aarch64
#define address_space_access_valid address_space_access_valid_aarch64
#define address_space_cache_destroy address_space_cache_destroy_aarch64
#define address_space_cache_init address_space_cache_init_aarch64
#define address_space_cache_invalidate address_space_cache_invalidate_aarch64
#define address_space_destroy address_space_destroy_aarch64
#define address_space_destroy_dispatch address_space_destroy_dispatch_aarch64
#define address_space_get_flatview address_space_get_flatview_aarch64
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_aarch64
#define address_space_ldl address_space_ldl_aarch64
#define address_space_ldl_be address_space_ldl_be_aarch64
#define address_space_ldl_be_cached address_space_ldl_be_cached_aarch64
#define address_space_ldl_cached address_space_ldl_cached_aarch64
#define address_space_ldl_le address_space_ldl_le_aarch64
#define address_space_ldl_le_cached address_space_ldl_le_cached_aarch64
#define address_space_ldq address_space_ldq_aarch64
#define address_space_ldq_be address_space_ldq_be_aarch64
#define address_space_ldq_be_cached address_space_ldq_be_cached_aarch64
#define address_space_ldq_cached address_space_ldq_cached_aarch64
#define address_space_ldq_le address_space_ldq_le_aarch64
#define address_space_ldq_le_cached address_space_ldq_le_cached_aarch64
#define address_space_ldub address_space_ldub_aarch64
#define address_space_ldub_cached address_space_ldub_cached_aarch64
#define address_space_lduw address_space_lduw_aarch64
#define address_space_lduw_be address_space_lduw_be_aarch64
#define address_space_lduw_be_cached address_space_lduw_be_cached_aarch64
#define address_space_lduw_cached address_space_lduw_cached_aarch64
#define address_space_lduw_le address_space_lduw_le_aarch64
#define address_space_lduw_le_cached address_space_lduw_le_cached_aarch64
#define address_space_lookup_region address_space_lookup_region_aarch64
#define address_space_map address_space_map_aarch64
#define address_space_read address_space_read_aarch64
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_aarch64
#define address_space_rw address_space_rw_aarch64
#define address_space_stb address_space_stb_aarch64
#define address_space_stb_cached address_space_stb_cached_aarch64
#define address_space_stl address_space_stl_aarch64
#define address_space_stl_be address_space_stl_be_aarch64
#define address_space_stl_be_cached address_space_stl_be_cached_aarch64
#define address_space_stl_cached address_space_stl_cached_aarch64
#define address_space_stl_le address_space_stl_le_aarch64
#define address_space_stl_le_cached address_space_stl_le_cached_aarch64
#define address_space_stl_notdirty address_space_stl_notdirty_aarch64
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_aarch64
#define address_space_stq address_space_stq_aarch64
#define address_space_stq_be address_space_stq_be_aarch64
#define address_space_stq_be_cached address_space_stq_be_cached_aarch64
#define address_space_stq_cached address_space_stq_cached_aarch64
#define address_space_stq_le address_space_stq_le_aarch64
#define address_space_stq_le_cached address_space_stq_le_cached_aarch64
#define address_space_stw address_space_stw_aarch64
#define address_space_stw_be address_space_stw_be_aarch64
#define address_space_stw_be_cached address_space_stw_be_cached_aarch64
#define address_space_stw_cached address_space_stw_cached_aarch64
#define address_space_stw_le address_space_stw_le_aarch64
#define address_space_stw_le_cached address_space_stw_le_cached_aarch64
#define address_space_translate address_space_translate_aarch64
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64
#define address_space_translate_internal address_space_translate_internal_aarch64
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_aarch64
#define ldl_be_p ldl_be_p_aarch64
#define ldl_be_phys ldl_be_phys_aarch64
#define ldl_be_phys_cached ldl_be_phys_cached_aarch64
#define ldl_he_p ldl_he_p_aarch64
#define ldl_le_p ldl_le_p_aarch64
#define ldl_le_phys ldl_le_phys_aarch64
#define ldl_le_phys_cached ldl_le_phys_cached_aarch64
#define ldl_phys ldl_phys_aarch64
#define ldl_phys_cached ldl_phys_cached_aarch64
#define ldl_phys_internal ldl_phys_internal_aarch64
#define ldq_be_p ldq_be_p_aarch64
#define ldq_be_phys ldq_be_phys_aarch64
#define ldq_be_phys_cached ldq_be_phys_cached_aarch64
#define ldq_he_p ldq_he_p_aarch64
#define ldq_le_p ldq_le_p_aarch64
#define ldq_le_phys ldq_le_phys_aarch64
#define ldq_le_phys_cached ldq_le_phys_cached_aarch64
#define ldq_phys ldq_phys_aarch64
#define ldq_phys_cached ldq_phys_cached_aarch64
#define ldq_phys_internal ldq_phys_internal_aarch64
#define ldst_name ldst_name_aarch64
#define ldub_p ldub_p_aarch64
#define ldub_phys ldub_phys_aarch64
#define ldub_phys_cached ldub_phys_cached_aarch64
#define lduw_be_p lduw_be_p_aarch64
#define lduw_be_phys lduw_be_phys_aarch64
#define lduw_be_phys_cached lduw_be_phys_cached_aarch64
#define lduw_he_p lduw_he_p_aarch64
#define lduw_le_p lduw_le_p_aarch64
#define lduw_le_phys lduw_le_phys_aarch64
#define lduw_le_phys_cached lduw_le_phys_cached_aarch64
#define lduw_phys lduw_phys_aarch64
#define lduw_phys_cached lduw_phys_cached_aarch64
#define lduw_phys_internal lduw_phys_internal_aarch64
#define le128 le128_aarch64
#define linked_bp_matches linked_bp_matches_aarch64
@ -2790,24 +2824,32 @@
#define start_list start_list_aarch64
#define stb_p stb_p_aarch64
#define stb_phys stb_phys_aarch64
#define stb_phys_cached stb_phys_cached_aarch64
#define stl_be_p stl_be_p_aarch64
#define stl_be_phys stl_be_phys_aarch64
#define stl_be_phys_cached stl_be_phys_cached_aarch64
#define stl_he_p stl_he_p_aarch64
#define stl_le_p stl_le_p_aarch64
#define stl_le_phys stl_le_phys_aarch64
#define stl_le_phys_cached stl_le_phys_cached_aarch64
#define stl_phys stl_phys_aarch64
#define stl_phys_cached stl_phys_cached_aarch64
#define stl_phys_internal stl_phys_internal_aarch64
#define stl_phys_notdirty stl_phys_notdirty_aarch64
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_aarch64
#define store_cpu_offset store_cpu_offset_aarch64
#define store_reg store_reg_aarch64
#define store_reg_bx store_reg_bx_aarch64
#define store_reg_from_load store_reg_from_load_aarch64
#define stq_be_p stq_be_p_aarch64
#define stq_be_phys stq_be_phys_aarch64
#define stq_be_phys_cached stq_be_phys_cached_aarch64
#define stq_he_p stq_he_p_aarch64
#define stq_le_p stq_le_p_aarch64
#define stq_le_phys stq_le_phys_aarch64
#define stq_le_phys_cached stq_le_phys_cached_aarch64
#define stq_phys stq_phys_aarch64
#define stq_phys_cached stq_phys_cached_aarch64
#define string_input_get_visitor string_input_get_visitor_aarch64
#define string_input_visitor_cleanup string_input_visitor_cleanup_aarch64
#define string_input_visitor_new string_input_visitor_new_aarch64
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_aarch64
#define strstart strstart_aarch64
#define stw_be_p stw_be_p_aarch64
#define stw_be_phys_cached stw_be_phys_cached_aarch64
#define stw_be_phys stw_be_phys_aarch64
#define stw_he_p stw_he_p_aarch64
#define stw_le_p stw_le_p_aarch64
#define stw_le_phys stw_le_phys_aarch64
#define stw_le_phys_cached stw_le_phys_cached_aarch64
#define stw_phys stw_phys_aarch64
#define stw_phys_cached stw_phys_cached_aarch64
#define stw_phys_internal stw_phys_internal_aarch64
#define sub128 sub128_aarch64
#define sub16_sat sub16_sat_aarch64

45
qemu/aarch64eb.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_aarch64eb
#define add_qemu_ldst_label add_qemu_ldst_label_aarch64eb
#define address_space_access_valid address_space_access_valid_aarch64eb
#define address_space_cache_destroy address_space_cache_destroy_aarch64eb
#define address_space_cache_init address_space_cache_init_aarch64eb
#define address_space_cache_invalidate address_space_cache_invalidate_aarch64eb
#define address_space_destroy address_space_destroy_aarch64eb
#define address_space_destroy_dispatch address_space_destroy_dispatch_aarch64eb
#define address_space_get_flatview address_space_get_flatview_aarch64eb
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_aarch64eb
#define address_space_ldl address_space_ldl_aarch64eb
#define address_space_ldl_be address_space_ldl_be_aarch64eb
#define address_space_ldl_be_cached address_space_ldl_be_cached_aarch64eb
#define address_space_ldl_cached address_space_ldl_cached_aarch64eb
#define address_space_ldl_le address_space_ldl_le_aarch64eb
#define address_space_ldl_le_cached address_space_ldl_le_cached_aarch64eb
#define address_space_ldq address_space_ldq_aarch64eb
#define address_space_ldq_be address_space_ldq_be_aarch64eb
#define address_space_ldq_be_cached address_space_ldq_be_cached_aarch64eb
#define address_space_ldq_cached address_space_ldq_cached_aarch64eb
#define address_space_ldq_le address_space_ldq_le_aarch64eb
#define address_space_ldq_le_cached address_space_ldq_le_cached_aarch64eb
#define address_space_ldub address_space_ldub_aarch64eb
#define address_space_ldub_cached address_space_ldub_cached_aarch64eb
#define address_space_lduw address_space_lduw_aarch64eb
#define address_space_lduw_be address_space_lduw_be_aarch64eb
#define address_space_lduw_be_cached address_space_lduw_be_cached_aarch64eb
#define address_space_lduw_cached address_space_lduw_cached_aarch64eb
#define address_space_lduw_le address_space_lduw_le_aarch64eb
#define address_space_lduw_le_cached address_space_lduw_le_cached_aarch64eb
#define address_space_lookup_region address_space_lookup_region_aarch64eb
#define address_space_map address_space_map_aarch64eb
#define address_space_read address_space_read_aarch64eb
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_aarch64eb
#define address_space_rw address_space_rw_aarch64eb
#define address_space_stb address_space_stb_aarch64eb
#define address_space_stb_cached address_space_stb_cached_aarch64eb
#define address_space_stl address_space_stl_aarch64eb
#define address_space_stl_be address_space_stl_be_aarch64eb
#define address_space_stl_be_cached address_space_stl_be_cached_aarch64eb
#define address_space_stl_cached address_space_stl_cached_aarch64eb
#define address_space_stl_le address_space_stl_le_aarch64eb
#define address_space_stl_le_cached address_space_stl_le_cached_aarch64eb
#define address_space_stl_notdirty address_space_stl_notdirty_aarch64eb
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_aarch64eb
#define address_space_stq address_space_stq_aarch64eb
#define address_space_stq_be address_space_stq_be_aarch64eb
#define address_space_stq_be_cached address_space_stq_be_cached_aarch64eb
#define address_space_stq_cached address_space_stq_cached_aarch64eb
#define address_space_stq_le address_space_stq_le_aarch64eb
#define address_space_stq_le_cached address_space_stq_le_cached_aarch64eb
#define address_space_stw address_space_stw_aarch64eb
#define address_space_stw_be address_space_stw_be_aarch64eb
#define address_space_stw_be_cached address_space_stw_be_cached_aarch64eb
#define address_space_stw_cached address_space_stw_cached_aarch64eb
#define address_space_stw_le address_space_stw_le_aarch64eb
#define address_space_stw_le_cached address_space_stw_le_cached_aarch64eb
#define address_space_translate address_space_translate_aarch64eb
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_aarch64eb
#define address_space_translate_internal address_space_translate_internal_aarch64eb
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_aarch64eb
#define ldl_be_p ldl_be_p_aarch64eb
#define ldl_be_phys ldl_be_phys_aarch64eb
#define ldl_be_phys_cached ldl_be_phys_cached_aarch64eb
#define ldl_he_p ldl_he_p_aarch64eb
#define ldl_le_p ldl_le_p_aarch64eb
#define ldl_le_phys ldl_le_phys_aarch64eb
#define ldl_le_phys_cached ldl_le_phys_cached_aarch64eb
#define ldl_phys ldl_phys_aarch64eb
#define ldl_phys_cached ldl_phys_cached_aarch64eb
#define ldl_phys_internal ldl_phys_internal_aarch64eb
#define ldq_be_p ldq_be_p_aarch64eb
#define ldq_be_phys ldq_be_phys_aarch64eb
#define ldq_be_phys_cached ldq_be_phys_cached_aarch64eb
#define ldq_he_p ldq_he_p_aarch64eb
#define ldq_le_p ldq_le_p_aarch64eb
#define ldq_le_phys ldq_le_phys_aarch64eb
#define ldq_le_phys_cached ldq_le_phys_cached_aarch64eb
#define ldq_phys ldq_phys_aarch64eb
#define ldq_phys_cached ldq_phys_cached_aarch64eb
#define ldq_phys_internal ldq_phys_internal_aarch64eb
#define ldst_name ldst_name_aarch64eb
#define ldub_p ldub_p_aarch64eb
#define ldub_phys ldub_phys_aarch64eb
#define ldub_phys_cached ldub_phys_cached_aarch64eb
#define lduw_be_p lduw_be_p_aarch64eb
#define lduw_be_phys lduw_be_phys_aarch64eb
#define lduw_be_phys_cached lduw_be_phys_cached_aarch64eb
#define lduw_he_p lduw_he_p_aarch64eb
#define lduw_le_p lduw_le_p_aarch64eb
#define lduw_le_phys lduw_le_phys_aarch64eb
#define lduw_le_phys_cached lduw_le_phys_cached_aarch64eb
#define lduw_phys lduw_phys_aarch64eb
#define lduw_phys_cached lduw_phys_cached_aarch64eb
#define lduw_phys_internal lduw_phys_internal_aarch64eb
#define le128 le128_aarch64eb
#define linked_bp_matches linked_bp_matches_aarch64eb
@ -2790,24 +2824,32 @@
#define start_list start_list_aarch64eb
#define stb_p stb_p_aarch64eb
#define stb_phys stb_phys_aarch64eb
#define stb_phys_cached stb_phys_cached_aarch64eb
#define stl_be_p stl_be_p_aarch64eb
#define stl_be_phys stl_be_phys_aarch64eb
#define stl_be_phys_cached stl_be_phys_cached_aarch64eb
#define stl_he_p stl_he_p_aarch64eb
#define stl_le_p stl_le_p_aarch64eb
#define stl_le_phys stl_le_phys_aarch64eb
#define stl_le_phys_cached stl_le_phys_cached_aarch64eb
#define stl_phys stl_phys_aarch64eb
#define stl_phys_cached stl_phys_cached_aarch64eb
#define stl_phys_internal stl_phys_internal_aarch64eb
#define stl_phys_notdirty stl_phys_notdirty_aarch64eb
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_aarch64eb
#define store_cpu_offset store_cpu_offset_aarch64eb
#define store_reg store_reg_aarch64eb
#define store_reg_bx store_reg_bx_aarch64eb
#define store_reg_from_load store_reg_from_load_aarch64eb
#define stq_be_p stq_be_p_aarch64eb
#define stq_be_phys stq_be_phys_aarch64eb
#define stq_be_phys_cached stq_be_phys_cached_aarch64eb
#define stq_he_p stq_he_p_aarch64eb
#define stq_le_p stq_le_p_aarch64eb
#define stq_le_phys stq_le_phys_aarch64eb
#define stq_le_phys_cached stq_le_phys_cached_aarch64eb
#define stq_phys stq_phys_aarch64eb
#define stq_phys_cached stq_phys_cached_aarch64eb
#define string_input_get_visitor string_input_get_visitor_aarch64eb
#define string_input_visitor_cleanup string_input_visitor_cleanup_aarch64eb
#define string_input_visitor_new string_input_visitor_new_aarch64eb
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_aarch64eb
#define strstart strstart_aarch64eb
#define stw_be_p stw_be_p_aarch64eb
#define stw_be_phys_cached stw_be_phys_cached_aarch64eb
#define stw_be_phys stw_be_phys_aarch64eb
#define stw_he_p stw_he_p_aarch64eb
#define stw_le_p stw_le_p_aarch64eb
#define stw_le_phys stw_le_phys_aarch64eb
#define stw_le_phys_cached stw_le_phys_cached_aarch64eb
#define stw_phys stw_phys_aarch64eb
#define stw_phys_cached stw_phys_cached_aarch64eb
#define stw_phys_internal stw_phys_internal_aarch64eb
#define sub128 sub128_aarch64eb
#define sub16_sat sub16_sat_aarch64eb

45
qemu/arm.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_arm
#define add_qemu_ldst_label add_qemu_ldst_label_arm
#define address_space_access_valid address_space_access_valid_arm
#define address_space_cache_destroy address_space_cache_destroy_arm
#define address_space_cache_init address_space_cache_init_arm
#define address_space_cache_invalidate address_space_cache_invalidate_arm
#define address_space_destroy address_space_destroy_arm
#define address_space_destroy_dispatch address_space_destroy_dispatch_arm
#define address_space_get_flatview address_space_get_flatview_arm
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_arm
#define address_space_ldl address_space_ldl_arm
#define address_space_ldl_be address_space_ldl_be_arm
#define address_space_ldl_be_cached address_space_ldl_be_cached_arm
#define address_space_ldl_cached address_space_ldl_cached_arm
#define address_space_ldl_le address_space_ldl_le_arm
#define address_space_ldl_le_cached address_space_ldl_le_cached_arm
#define address_space_ldq address_space_ldq_arm
#define address_space_ldq_be address_space_ldq_be_arm
#define address_space_ldq_be_cached address_space_ldq_be_cached_arm
#define address_space_ldq_cached address_space_ldq_cached_arm
#define address_space_ldq_le address_space_ldq_le_arm
#define address_space_ldq_le_cached address_space_ldq_le_cached_arm
#define address_space_ldub address_space_ldub_arm
#define address_space_ldub_cached address_space_ldub_cached_arm
#define address_space_lduw address_space_lduw_arm
#define address_space_lduw_be address_space_lduw_be_arm
#define address_space_lduw_be_cached address_space_lduw_be_cached_arm
#define address_space_lduw_cached address_space_lduw_cached_arm
#define address_space_lduw_le address_space_lduw_le_arm
#define address_space_lduw_le_cached address_space_lduw_le_cached_arm
#define address_space_lookup_region address_space_lookup_region_arm
#define address_space_map address_space_map_arm
#define address_space_read address_space_read_arm
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_arm
#define address_space_rw address_space_rw_arm
#define address_space_stb address_space_stb_arm
#define address_space_stb_cached address_space_stb_cached_arm
#define address_space_stl address_space_stl_arm
#define address_space_stl_be address_space_stl_be_arm
#define address_space_stl_be_cached address_space_stl_be_cached_arm
#define address_space_stl_cached address_space_stl_cached_arm
#define address_space_stl_le address_space_stl_le_arm
#define address_space_stl_le_cached address_space_stl_le_cached_arm
#define address_space_stl_notdirty address_space_stl_notdirty_arm
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_arm
#define address_space_stq address_space_stq_arm
#define address_space_stq_be address_space_stq_be_arm
#define address_space_stq_be_cached address_space_stq_be_cached_arm
#define address_space_stq_cached address_space_stq_cached_arm
#define address_space_stq_le address_space_stq_le_arm
#define address_space_stq_le_cached address_space_stq_le_cached_arm
#define address_space_stw address_space_stw_arm
#define address_space_stw_be address_space_stw_be_arm
#define address_space_stw_be_cached address_space_stw_be_cached_arm
#define address_space_stw_cached address_space_stw_cached_arm
#define address_space_stw_le address_space_stw_le_arm
#define address_space_stw_le_cached address_space_stw_le_cached_arm
#define address_space_translate address_space_translate_arm
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_arm
#define address_space_translate_internal address_space_translate_internal_arm
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_arm
#define ldl_be_p ldl_be_p_arm
#define ldl_be_phys ldl_be_phys_arm
#define ldl_be_phys_cached ldl_be_phys_cached_arm
#define ldl_he_p ldl_he_p_arm
#define ldl_le_p ldl_le_p_arm
#define ldl_le_phys ldl_le_phys_arm
#define ldl_le_phys_cached ldl_le_phys_cached_arm
#define ldl_phys ldl_phys_arm
#define ldl_phys_cached ldl_phys_cached_arm
#define ldl_phys_internal ldl_phys_internal_arm
#define ldq_be_p ldq_be_p_arm
#define ldq_be_phys ldq_be_phys_arm
#define ldq_be_phys_cached ldq_be_phys_cached_arm
#define ldq_he_p ldq_he_p_arm
#define ldq_le_p ldq_le_p_arm
#define ldq_le_phys ldq_le_phys_arm
#define ldq_le_phys_cached ldq_le_phys_cached_arm
#define ldq_phys ldq_phys_arm
#define ldq_phys_cached ldq_phys_cached_arm
#define ldq_phys_internal ldq_phys_internal_arm
#define ldst_name ldst_name_arm
#define ldub_p ldub_p_arm
#define ldub_phys ldub_phys_arm
#define ldub_phys_cached ldub_phys_cached_arm
#define lduw_be_p lduw_be_p_arm
#define lduw_be_phys lduw_be_phys_arm
#define lduw_be_phys_cached lduw_be_phys_cached_arm
#define lduw_he_p lduw_he_p_arm
#define lduw_le_p lduw_le_p_arm
#define lduw_le_phys lduw_le_phys_arm
#define lduw_le_phys_cached lduw_le_phys_cached_arm
#define lduw_phys lduw_phys_arm
#define lduw_phys_cached lduw_phys_cached_arm
#define lduw_phys_internal lduw_phys_internal_arm
#define le128 le128_arm
#define linked_bp_matches linked_bp_matches_arm
@ -2790,24 +2824,32 @@
#define start_list start_list_arm
#define stb_p stb_p_arm
#define stb_phys stb_phys_arm
#define stb_phys_cached stb_phys_cached_arm
#define stl_be_p stl_be_p_arm
#define stl_be_phys stl_be_phys_arm
#define stl_be_phys_cached stl_be_phys_cached_arm
#define stl_he_p stl_he_p_arm
#define stl_le_p stl_le_p_arm
#define stl_le_phys stl_le_phys_arm
#define stl_le_phys_cached stl_le_phys_cached_arm
#define stl_phys stl_phys_arm
#define stl_phys_cached stl_phys_cached_arm
#define stl_phys_internal stl_phys_internal_arm
#define stl_phys_notdirty stl_phys_notdirty_arm
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_arm
#define store_cpu_offset store_cpu_offset_arm
#define store_reg store_reg_arm
#define store_reg_bx store_reg_bx_arm
#define store_reg_from_load store_reg_from_load_arm
#define stq_be_p stq_be_p_arm
#define stq_be_phys stq_be_phys_arm
#define stq_be_phys_cached stq_be_phys_cached_arm
#define stq_he_p stq_he_p_arm
#define stq_le_p stq_le_p_arm
#define stq_le_phys stq_le_phys_arm
#define stq_le_phys_cached stq_le_phys_cached_arm
#define stq_phys stq_phys_arm
#define stq_phys_cached stq_phys_cached_arm
#define string_input_get_visitor string_input_get_visitor_arm
#define string_input_visitor_cleanup string_input_visitor_cleanup_arm
#define string_input_visitor_new string_input_visitor_new_arm
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_arm
#define strstart strstart_arm
#define stw_be_p stw_be_p_arm
#define stw_be_phys_cached stw_be_phys_cached_arm
#define stw_be_phys stw_be_phys_arm
#define stw_he_p stw_he_p_arm
#define stw_le_p stw_le_p_arm
#define stw_le_phys stw_le_phys_arm
#define stw_le_phys_cached stw_le_phys_cached_arm
#define stw_phys stw_phys_arm
#define stw_phys_cached stw_phys_cached_arm
#define stw_phys_internal stw_phys_internal_arm
#define sub128 sub128_arm
#define sub16_sat sub16_sat_arm

45
qemu/armeb.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_armeb
#define add_qemu_ldst_label add_qemu_ldst_label_armeb
#define address_space_access_valid address_space_access_valid_armeb
#define address_space_cache_destroy address_space_cache_destroy_armeb
#define address_space_cache_init address_space_cache_init_armeb
#define address_space_cache_invalidate address_space_cache_invalidate_armeb
#define address_space_destroy address_space_destroy_armeb
#define address_space_destroy_dispatch address_space_destroy_dispatch_armeb
#define address_space_get_flatview address_space_get_flatview_armeb
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_armeb
#define address_space_ldl address_space_ldl_armeb
#define address_space_ldl_be address_space_ldl_be_armeb
#define address_space_ldl_be_cached address_space_ldl_be_cached_armeb
#define address_space_ldl_cached address_space_ldl_cached_armeb
#define address_space_ldl_le address_space_ldl_le_armeb
#define address_space_ldl_le_cached address_space_ldl_le_cached_armeb
#define address_space_ldq address_space_ldq_armeb
#define address_space_ldq_be address_space_ldq_be_armeb
#define address_space_ldq_be_cached address_space_ldq_be_cached_armeb
#define address_space_ldq_cached address_space_ldq_cached_armeb
#define address_space_ldq_le address_space_ldq_le_armeb
#define address_space_ldq_le_cached address_space_ldq_le_cached_armeb
#define address_space_ldub address_space_ldub_armeb
#define address_space_ldub_cached address_space_ldub_cached_armeb
#define address_space_lduw address_space_lduw_armeb
#define address_space_lduw_be address_space_lduw_be_armeb
#define address_space_lduw_be_cached address_space_lduw_be_cached_armeb
#define address_space_lduw_cached address_space_lduw_cached_armeb
#define address_space_lduw_le address_space_lduw_le_armeb
#define address_space_lduw_le_cached address_space_lduw_le_cached_armeb
#define address_space_lookup_region address_space_lookup_region_armeb
#define address_space_map address_space_map_armeb
#define address_space_read address_space_read_armeb
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_armeb
#define address_space_rw address_space_rw_armeb
#define address_space_stb address_space_stb_armeb
#define address_space_stb_cached address_space_stb_cached_armeb
#define address_space_stl address_space_stl_armeb
#define address_space_stl_be address_space_stl_be_armeb
#define address_space_stl_be_cached address_space_stl_be_cached_armeb
#define address_space_stl_cached address_space_stl_cached_armeb
#define address_space_stl_le address_space_stl_le_armeb
#define address_space_stl_le_cached address_space_stl_le_cached_armeb
#define address_space_stl_notdirty address_space_stl_notdirty_armeb
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_armeb
#define address_space_stq address_space_stq_armeb
#define address_space_stq_be address_space_stq_be_armeb
#define address_space_stq_be_cached address_space_stq_be_cached_armeb
#define address_space_stq_cached address_space_stq_cached_armeb
#define address_space_stq_le address_space_stq_le_armeb
#define address_space_stq_le_cached address_space_stq_le_cached_armeb
#define address_space_stw address_space_stw_armeb
#define address_space_stw_be address_space_stw_be_armeb
#define address_space_stw_be_cached address_space_stw_be_cached_armeb
#define address_space_stw_cached address_space_stw_cached_armeb
#define address_space_stw_le address_space_stw_le_armeb
#define address_space_stw_le_cached address_space_stw_le_cached_armeb
#define address_space_translate address_space_translate_armeb
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_armeb
#define address_space_translate_internal address_space_translate_internal_armeb
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_armeb
#define ldl_be_p ldl_be_p_armeb
#define ldl_be_phys ldl_be_phys_armeb
#define ldl_be_phys_cached ldl_be_phys_cached_armeb
#define ldl_he_p ldl_he_p_armeb
#define ldl_le_p ldl_le_p_armeb
#define ldl_le_phys ldl_le_phys_armeb
#define ldl_le_phys_cached ldl_le_phys_cached_armeb
#define ldl_phys ldl_phys_armeb
#define ldl_phys_cached ldl_phys_cached_armeb
#define ldl_phys_internal ldl_phys_internal_armeb
#define ldq_be_p ldq_be_p_armeb
#define ldq_be_phys ldq_be_phys_armeb
#define ldq_be_phys_cached ldq_be_phys_cached_armeb
#define ldq_he_p ldq_he_p_armeb
#define ldq_le_p ldq_le_p_armeb
#define ldq_le_phys ldq_le_phys_armeb
#define ldq_le_phys_cached ldq_le_phys_cached_armeb
#define ldq_phys ldq_phys_armeb
#define ldq_phys_cached ldq_phys_cached_armeb
#define ldq_phys_internal ldq_phys_internal_armeb
#define ldst_name ldst_name_armeb
#define ldub_p ldub_p_armeb
#define ldub_phys ldub_phys_armeb
#define ldub_phys_cached ldub_phys_cached_armeb
#define lduw_be_p lduw_be_p_armeb
#define lduw_be_phys lduw_be_phys_armeb
#define lduw_be_phys_cached lduw_be_phys_cached_armeb
#define lduw_he_p lduw_he_p_armeb
#define lduw_le_p lduw_le_p_armeb
#define lduw_le_phys lduw_le_phys_armeb
#define lduw_le_phys_cached lduw_le_phys_cached_armeb
#define lduw_phys lduw_phys_armeb
#define lduw_phys_cached lduw_phys_cached_armeb
#define lduw_phys_internal lduw_phys_internal_armeb
#define le128 le128_armeb
#define linked_bp_matches linked_bp_matches_armeb
@ -2790,24 +2824,32 @@
#define start_list start_list_armeb
#define stb_p stb_p_armeb
#define stb_phys stb_phys_armeb
#define stb_phys_cached stb_phys_cached_armeb
#define stl_be_p stl_be_p_armeb
#define stl_be_phys stl_be_phys_armeb
#define stl_be_phys_cached stl_be_phys_cached_armeb
#define stl_he_p stl_he_p_armeb
#define stl_le_p stl_le_p_armeb
#define stl_le_phys stl_le_phys_armeb
#define stl_le_phys_cached stl_le_phys_cached_armeb
#define stl_phys stl_phys_armeb
#define stl_phys_cached stl_phys_cached_armeb
#define stl_phys_internal stl_phys_internal_armeb
#define stl_phys_notdirty stl_phys_notdirty_armeb
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_armeb
#define store_cpu_offset store_cpu_offset_armeb
#define store_reg store_reg_armeb
#define store_reg_bx store_reg_bx_armeb
#define store_reg_from_load store_reg_from_load_armeb
#define stq_be_p stq_be_p_armeb
#define stq_be_phys stq_be_phys_armeb
#define stq_be_phys_cached stq_be_phys_cached_armeb
#define stq_he_p stq_he_p_armeb
#define stq_le_p stq_le_p_armeb
#define stq_le_phys stq_le_phys_armeb
#define stq_le_phys_cached stq_le_phys_cached_armeb
#define stq_phys stq_phys_armeb
#define stq_phys_cached stq_phys_cached_armeb
#define string_input_get_visitor string_input_get_visitor_armeb
#define string_input_visitor_cleanup string_input_visitor_cleanup_armeb
#define string_input_visitor_new string_input_visitor_new_armeb
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_armeb
#define strstart strstart_armeb
#define stw_be_p stw_be_p_armeb
#define stw_be_phys_cached stw_be_phys_cached_armeb
#define stw_be_phys stw_be_phys_armeb
#define stw_he_p stw_he_p_armeb
#define stw_le_p stw_le_p_armeb
#define stw_le_phys stw_le_phys_armeb
#define stw_le_phys_cached stw_le_phys_cached_armeb
#define stw_phys stw_phys_armeb
#define stw_phys_cached stw_phys_cached_armeb
#define stw_phys_internal stw_phys_internal_armeb
#define sub128 sub128_armeb
#define sub16_sat sub16_sat_armeb

128
qemu/exec.c
View File

@ -2384,6 +2384,134 @@ void cpu_physical_memory_unmap(AddressSpace *as, void *buffer, hwaddr len,
#define RCU_READ_UNLOCK(...) rcu_read_unlock()
#include "memory_ldst.inc.c"
int64_t address_space_cache_init(MemoryRegionCache *cache,
AddressSpace *as,
hwaddr addr,
hwaddr len,
bool is_write)
{
hwaddr l, xlat;
MemoryRegion *mr;
void *ptr;
assert(len > 0);
l = len;
mr = address_space_translate(as, addr, &xlat, &l, is_write);
if (!memory_access_is_direct(mr, is_write)) {
return -EINVAL;
}
l = address_space_extend_translation(as, addr, len, mr, xlat, l, is_write);
ptr = qemu_ram_ptr_length(mr->uc, mr->ram_block, xlat, &l);
cache->xlat = xlat;
cache->is_write = is_write;
cache->mr = mr;
cache->ptr = ptr;
cache->len = l;
memory_region_ref(cache->mr);
return l;
}
void address_space_cache_invalidate(MemoryRegionCache *cache,
hwaddr addr,
hwaddr access_len)
{
assert(cache->is_write);
invalidate_and_set_dirty(cache->mr, addr + cache->xlat, access_len);
}
void address_space_cache_destroy(MemoryRegionCache *cache)
{
if (!cache->mr) {
return;
}
// Unicorn: If'd out
#if 0
if (xen_enabled()) {
xen_invalidate_map_cache_entry(cache->ptr);
}
#endif
memory_region_unref(cache->mr);
}
/* Called from RCU critical section. This function has the same
* semantics as address_space_translate, but it only works on a
* predefined range of a MemoryRegion that was mapped with
* address_space_cache_init.
*/
static inline MemoryRegion *address_space_translate_cached(
MemoryRegionCache *cache, hwaddr addr, hwaddr *xlat,
hwaddr *plen, bool is_write)
{
assert(addr < cache->len && *plen <= cache->len - addr);
*xlat = addr + cache->xlat;
return cache->mr;
}
// Unicorn: Necessary due to the fantastic way duplicate
// symbol errors are avoided.
// When appending the "_cache" suffix, the preprocessor
// replaces the names in the glue macros with the target's
// equivalent, resulting in names like "address_space_ldl_be_aarch64_cached"
// which is incorrect. Therefore undef all the offending macros beforehand.
#undef address_space_ldl
#undef address_space_ldl_be
#undef address_space_ldl_le
#undef address_space_ldq
#undef address_space_ldq_be
#undef address_space_ldq_le
#undef address_space_ldub
#undef address_space_lduw
#undef address_space_lduw_be
#undef address_space_lduw_le
#undef address_space_stb
#undef address_space_stl
#undef address_space_stl_be
#undef address_space_stl_le
#undef address_space_stl_notdirty
#undef address_space_stq
#undef address_space_stq_be
#undef address_space_stq_le
#undef address_space_stw
#undef address_space_stw_be
#undef address_space_stw_le
#undef ldl_be_phys
#undef ldl_le_phys
#undef ldl_phys
#undef ldq_be_phys
#undef ldq_le_phys
#undef ldq_phys
#undef ldub_phys
#undef lduw_be_phys
#undef lduw_le_phys
#undef lduw_phys
#undef stb_phys
#undef stl_be_phys
#undef stl_le_phys
#undef stl_phys
#undef stl_phys_notdirty
#undef stq_be_phys
#undef stq_le_phys
#undef stq_phys
#undef stw_be_phys
#undef stw_le_phys
#undef stw_phys
#define ARG1_DECL MemoryRegionCache *cache
#define ARG1 cache
#define SUFFIX _cached
#define TRANSLATE(...) address_space_translate_cached(cache, __VA_ARGS__)
#define IS_DIRECT(mr, is_write) true
#define MAP_RAM(mr, ofs) (cache->ptr + (ofs - cache->xlat))
#define INVALIDATE(mr, ofs, len) ((void)0)
#define RCU_READ_LOCK() ((void)0)
#define RCU_READ_UNLOCK() ((void)0)
#include "memory_ldst.inc.c"
/* virtual memory access for debug (includes writing to ROM) */
int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
uint8_t *buf, int len, int is_write)

45
qemu/header_gen.py
View File

@ -56,6 +56,9 @@ symbols = (
'add_cpreg_to_list',
'add_qemu_ldst_label',
'address_space_access_valid',
'address_space_cache_destroy',
'address_space_cache_init',
'address_space_cache_invalidate',
'address_space_destroy',
'address_space_destroy_dispatch',
'address_space_get_flatview',
@ -64,14 +67,24 @@ symbols = (
'address_space_init_shareable',
'address_space_ldl',
'address_space_ldl_be',
'address_space_ldl_be_cached',
'address_space_ldl_cached',
'address_space_ldl_le',
'address_space_ldl_le_cached',
'address_space_ldq',
'address_space_ldq_be',
'address_space_ldq_be_cached',
'address_space_ldq_cached',
'address_space_ldq_le',
'address_space_ldq_le_cached',
'address_space_ldub',
'address_space_ldub_cached',
'address_space_lduw',
'address_space_lduw_be',
'address_space_lduw_be_cached',
'address_space_lduw_cached',
'address_space_lduw_le',
'address_space_lduw_le_cached',
'address_space_lookup_region',
'address_space_map',
'address_space_read',
@ -79,16 +92,27 @@ symbols = (
'address_space_read_full',
'address_space_rw',
'address_space_stb',
'address_space_stb_cached',
'address_space_stl',
'address_space_stl_be',
'address_space_stl_be_cached',
'address_space_stl_cached',
'address_space_stl_le',
'address_space_stl_le_cached',
'address_space_stl_notdirty',
'address_space_stl_notdirty_cached',
'address_space_stq',
'address_space_stq_be',
'address_space_stq_be_cached',
'address_space_stq_cached',
'address_space_stq_le',
'address_space_stq_le_cached',
'address_space_stw',
'address_space_stw_be',
'address_space_stw_be_cached',
'address_space_stw_cached',
'address_space_stw_le',
'address_space_stw_le_cached',
'address_space_translate',
'address_space_translate_for_iotlb',
'address_space_translate_internal',
@ -2168,27 +2192,37 @@ symbols = (
'last_ram_offset',
'ldl_be_p',
'ldl_be_phys',
'ldl_be_phys_cached',
'ldl_he_p',
'ldl_le_p',
'ldl_le_phys',
'ldl_le_phys_cached',
'ldl_phys',
'ldl_phys_cached',
'ldl_phys_internal',
'ldq_be_p',
'ldq_be_phys',
'ldq_be_phys_cached',
'ldq_he_p',
'ldq_le_p',
'ldq_le_phys',
'ldq_le_phys_cached',
'ldq_phys',
'ldq_phys_cached',
'ldq_phys_internal',
'ldst_name',
'ldub_p',
'ldub_phys',
'ldub_phys_cached',
'lduw_be_p',
'lduw_be_phys',
'lduw_be_phys_cached',
'lduw_he_p',
'lduw_le_p',
'lduw_le_phys',
'lduw_le_phys_cached',
'lduw_phys',
'lduw_phys_cached',
'lduw_phys_internal',
'le128',
'linked_bp_matches',
@ -2796,24 +2830,32 @@ symbols = (
'start_list',
'stb_p',
'stb_phys',
'stb_phys_cached',
'stl_be_p',
'stl_be_phys',
'stl_be_phys_cached',
'stl_he_p',
'stl_le_p',
'stl_le_phys',
'stl_le_phys_cached',
'stl_phys',
'stl_phys_cached',
'stl_phys_internal',
'stl_phys_notdirty',
'stl_phys_notdirty_cached',
'store_cpu_offset',
'store_reg',
'store_reg_bx',
'store_reg_from_load',
'stq_be_p',
'stq_be_phys',
'stq_be_phys_cached',
'stq_he_p',
'stq_le_p',
'stq_le_phys',
'stq_le_phys_cached',
'stq_phys',
'stq_phys_cached',
'string_input_get_visitor',
'string_input_visitor_cleanup',
'string_input_visitor_new',
@ -2823,10 +2865,13 @@ symbols = (
'strstart',
'stw_be_p',
'stw_be_phys',
'stw_be_phys_cached',
'stw_he_p',
'stw_le_p',
'stw_le_phys',
'stw_le_phys_cached',
'stw_phys',
'stw_phys_cached',
'stw_phys_internal',
'sub128',
'sub16_sat',

23
qemu/include/exec/cpu-all.h
View File

@ -227,6 +227,29 @@ void address_space_stl(AddressSpace *as, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stq(AddressSpace *as, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
uint32_t lduw_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint32_t ldl_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint64_t ldq_phys_cached(MemoryRegionCache *cache, hwaddr addr);
void stl_phys_notdirty_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stw_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stl_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stq_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val);
uint32_t address_space_lduw_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t address_space_ldl_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint64_t address_space_ldq_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stl_notdirty_cached(MemoryRegionCache *cache, hwaddr addr,
uint32_t val, MemTxAttrs attrs, MemTxResult *result);
void address_space_stw_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stl_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stq_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
#endif
/* page related stuff */

151
qemu/include/exec/memory.h
View File

@ -1095,6 +1095,125 @@ void stl_be_phys(AddressSpace *as, hwaddr addr, uint32_t val);
void stq_le_phys(AddressSpace *as, hwaddr addr, uint64_t val);
void stq_be_phys(AddressSpace *as, hwaddr addr, uint64_t val);
struct MemoryRegionCache {
hwaddr xlat;
void *ptr;
hwaddr len;
MemoryRegion *mr;
bool is_write;
};
/* address_space_cache_init: prepare for repeated access to a physical
* memory region
*
* @cache: #MemoryRegionCache to be filled
* @as: #AddressSpace to be accessed
* @addr: address within that address space
* @len: length of buffer
* @is_write: indicates the transfer direction
*
* Will only work with RAM, and may map a subset of the requested range by
* returning a value that is less than @len. On failure, return a negative
* errno value.
*
* Because it only works with RAM, this function can be used for
* read-modify-write operations. In this case, is_write should be %true.
*
* Note that addresses passed to the address_space_*_cached functions
* are relative to @addr.
*/
int64_t address_space_cache_init(MemoryRegionCache *cache,
AddressSpace *as,
hwaddr addr,
hwaddr len,
bool is_write);
/**
* address_space_cache_invalidate: complete a write to a #MemoryRegionCache
*
* @cache: The #MemoryRegionCache to operate on.
* @addr: The first physical address that was written, relative to the
* address that was passed to @address_space_cache_init.
* @access_len: The number of bytes that were written starting at @addr.
*/
void address_space_cache_invalidate(MemoryRegionCache *cache,
hwaddr addr,
hwaddr access_len);
/**
* address_space_cache_destroy: free a #MemoryRegionCache
*
* @cache: The #MemoryRegionCache whose memory should be released.
*/
void address_space_cache_destroy(MemoryRegionCache *cache);
/* address_space_ld*_cached: load from a cached #MemoryRegion
* address_space_st*_cached: store into a cached #MemoryRegion
*
* These functions perform a load or store of the byte, word,
* longword or quad to the specified address. The address is
* a physical address in the AddressSpace, but it must lie within
* a #MemoryRegion that was mapped with address_space_cache_init.
*
* The _le suffixed functions treat the data as little endian;
* _be indicates big endian; no suffix indicates "same endianness
* as guest CPU".
*
* The "guest CPU endianness" accessors are deprecated for use outside
* target-* code; devices should be CPU-agnostic and use either the LE
* or the BE accessors.
*
* @cache: previously initialized #MemoryRegionCache to be accessed
* @addr: address within the address space
* @val: data value, for stores
* @attrs: memory transaction attributes
* @result: location to write the success/failure of the transaction;
* if NULL, this information is discarded
*/
uint32_t address_space_ldub_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t address_space_lduw_le_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t address_space_lduw_be_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t address_space_ldl_le_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint32_t address_space_ldl_be_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint64_t address_space_ldq_le_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
uint64_t address_space_ldq_be_cached(MemoryRegionCache *cache, hwaddr addr,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stb_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stw_le_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stw_be_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stl_le_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stl_be_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stq_le_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
void address_space_stq_be_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val,
MemTxAttrs attrs, MemTxResult *result);
uint32_t ldub_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint32_t lduw_le_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint32_t lduw_be_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint32_t ldl_le_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint32_t ldl_be_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint64_t ldq_le_phys_cached(MemoryRegionCache *cache, hwaddr addr);
uint64_t ldq_be_phys_cached(MemoryRegionCache *cache, hwaddr addr);
void stb_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stw_le_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stw_be_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stl_le_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stl_be_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint32_t val);
void stq_le_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val);
void stq_be_phys_cached(MemoryRegionCache *cache, hwaddr addr, uint64_t val);
/* address_space_translate: translate an address range into an address space
* into a MemoryRegion and an address range into that section
*
@ -1229,6 +1348,38 @@ MemTxResult address_space_read(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,
return result;
}
/**
* address_space_read_cached: read from a cached RAM region
*
* @cache: Cached region to be addressed
* @addr: address relative to the base of the RAM region
* @buf: buffer with the data transferred
* @len: length of the data transferred
*/
static inline void
address_space_read_cached(MemoryRegionCache *cache, hwaddr addr,
void *buf, int len)
{
assert(addr < cache->len && len <= cache->len - addr);
memcpy(buf, cache->ptr + addr, len);
}
/**
* address_space_write_cached: write to a cached RAM region
*
* @cache: Cached region to be addressed
* @addr: address relative to the base of the RAM region
* @buf: buffer with the data transferred
* @len: length of the data transferred
*/
static inline void
address_space_write_cached(MemoryRegionCache *cache, hwaddr addr,
void *buf, int len)
{
assert(addr < cache->len && len <= cache->len - addr);
memcpy(cache->ptr + addr, buf, len);
}
#endif
#endif

1
qemu/include/qemu/typedefs.h
View File

@ -37,6 +37,7 @@ typedef struct MachineState MachineState;
typedef struct MemoryListener MemoryListener;
typedef struct MemoryMappingList MemoryMappingList;
typedef struct MemoryRegion MemoryRegion;
typedef struct MemoryRegionCache MemoryRegionCache;
typedef struct MemoryRegionSection MemoryRegionSection;
typedef struct MigrationParams MigrationParams;
typedef struct MouseTransformInfo MouseTransformInfo;

45
qemu/m68k.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_m68k
#define add_qemu_ldst_label add_qemu_ldst_label_m68k
#define address_space_access_valid address_space_access_valid_m68k
#define address_space_cache_destroy address_space_cache_destroy_m68k
#define address_space_cache_init address_space_cache_init_m68k
#define address_space_cache_invalidate address_space_cache_invalidate_m68k
#define address_space_destroy address_space_destroy_m68k
#define address_space_destroy_dispatch address_space_destroy_dispatch_m68k
#define address_space_get_flatview address_space_get_flatview_m68k
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_m68k
#define address_space_ldl address_space_ldl_m68k
#define address_space_ldl_be address_space_ldl_be_m68k
#define address_space_ldl_be_cached address_space_ldl_be_cached_m68k
#define address_space_ldl_cached address_space_ldl_cached_m68k
#define address_space_ldl_le address_space_ldl_le_m68k
#define address_space_ldl_le_cached address_space_ldl_le_cached_m68k
#define address_space_ldq address_space_ldq_m68k
#define address_space_ldq_be address_space_ldq_be_m68k
#define address_space_ldq_be_cached address_space_ldq_be_cached_m68k
#define address_space_ldq_cached address_space_ldq_cached_m68k
#define address_space_ldq_le address_space_ldq_le_m68k
#define address_space_ldq_le_cached address_space_ldq_le_cached_m68k
#define address_space_ldub address_space_ldub_m68k
#define address_space_ldub_cached address_space_ldub_cached_m68k
#define address_space_lduw address_space_lduw_m68k
#define address_space_lduw_be address_space_lduw_be_m68k
#define address_space_lduw_be_cached address_space_lduw_be_cached_m68k
#define address_space_lduw_cached address_space_lduw_cached_m68k
#define address_space_lduw_le address_space_lduw_le_m68k
#define address_space_lduw_le_cached address_space_lduw_le_cached_m68k
#define address_space_lookup_region address_space_lookup_region_m68k
#define address_space_map address_space_map_m68k
#define address_space_read address_space_read_m68k
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_m68k
#define address_space_rw address_space_rw_m68k
#define address_space_stb address_space_stb_m68k
#define address_space_stb_cached address_space_stb_cached_m68k
#define address_space_stl address_space_stl_m68k
#define address_space_stl_be address_space_stl_be_m68k
#define address_space_stl_be_cached address_space_stl_be_cached_m68k
#define address_space_stl_cached address_space_stl_cached_m68k
#define address_space_stl_le address_space_stl_le_m68k
#define address_space_stl_le_cached address_space_stl_le_cached_m68k
#define address_space_stl_notdirty address_space_stl_notdirty_m68k
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_m68k
#define address_space_stq address_space_stq_m68k
#define address_space_stq_be address_space_stq_be_m68k
#define address_space_stq_be_cached address_space_stq_be_cached_m68k
#define address_space_stq_cached address_space_stq_cached_m68k
#define address_space_stq_le address_space_stq_le_m68k
#define address_space_stq_le_cached address_space_stq_le_cached_m68k
#define address_space_stw address_space_stw_m68k
#define address_space_stw_be address_space_stw_be_m68k
#define address_space_stw_be_cached address_space_stw_be_cached_m68k
#define address_space_stw_cached address_space_stw_cached_m68k
#define address_space_stw_le address_space_stw_le_m68k
#define address_space_stw_le_cached address_space_stw_le_cached_m68k
#define address_space_translate address_space_translate_m68k
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_m68k
#define address_space_translate_internal address_space_translate_internal_m68k
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_m68k
#define ldl_be_p ldl_be_p_m68k
#define ldl_be_phys ldl_be_phys_m68k
#define ldl_be_phys_cached ldl_be_phys_cached_m68k
#define ldl_he_p ldl_he_p_m68k
#define ldl_le_p ldl_le_p_m68k
#define ldl_le_phys ldl_le_phys_m68k
#define ldl_le_phys_cached ldl_le_phys_cached_m68k
#define ldl_phys ldl_phys_m68k
#define ldl_phys_cached ldl_phys_cached_m68k
#define ldl_phys_internal ldl_phys_internal_m68k
#define ldq_be_p ldq_be_p_m68k
#define ldq_be_phys ldq_be_phys_m68k
#define ldq_be_phys_cached ldq_be_phys_cached_m68k
#define ldq_he_p ldq_he_p_m68k
#define ldq_le_p ldq_le_p_m68k
#define ldq_le_phys ldq_le_phys_m68k
#define ldq_le_phys_cached ldq_le_phys_cached_m68k
#define ldq_phys ldq_phys_m68k
#define ldq_phys_cached ldq_phys_cached_m68k
#define ldq_phys_internal ldq_phys_internal_m68k
#define ldst_name ldst_name_m68k
#define ldub_p ldub_p_m68k
#define ldub_phys ldub_phys_m68k
#define ldub_phys_cached ldub_phys_cached_m68k
#define lduw_be_p lduw_be_p_m68k
#define lduw_be_phys lduw_be_phys_m68k
#define lduw_be_phys_cached lduw_be_phys_cached_m68k
#define lduw_he_p lduw_he_p_m68k
#define lduw_le_p lduw_le_p_m68k
#define lduw_le_phys lduw_le_phys_m68k
#define lduw_le_phys_cached lduw_le_phys_cached_m68k
#define lduw_phys lduw_phys_m68k
#define lduw_phys_cached lduw_phys_cached_m68k
#define lduw_phys_internal lduw_phys_internal_m68k
#define le128 le128_m68k
#define linked_bp_matches linked_bp_matches_m68k
@ -2790,24 +2824,32 @@
#define start_list start_list_m68k
#define stb_p stb_p_m68k
#define stb_phys stb_phys_m68k
#define stb_phys_cached stb_phys_cached_m68k
#define stl_be_p stl_be_p_m68k
#define stl_be_phys stl_be_phys_m68k
#define stl_be_phys_cached stl_be_phys_cached_m68k
#define stl_he_p stl_he_p_m68k
#define stl_le_p stl_le_p_m68k
#define stl_le_phys stl_le_phys_m68k
#define stl_le_phys_cached stl_le_phys_cached_m68k
#define stl_phys stl_phys_m68k
#define stl_phys_cached stl_phys_cached_m68k
#define stl_phys_internal stl_phys_internal_m68k
#define stl_phys_notdirty stl_phys_notdirty_m68k
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_m68k
#define store_cpu_offset store_cpu_offset_m68k
#define store_reg store_reg_m68k
#define store_reg_bx store_reg_bx_m68k
#define store_reg_from_load store_reg_from_load_m68k
#define stq_be_p stq_be_p_m68k
#define stq_be_phys stq_be_phys_m68k
#define stq_be_phys_cached stq_be_phys_cached_m68k
#define stq_he_p stq_he_p_m68k
#define stq_le_p stq_le_p_m68k
#define stq_le_phys stq_le_phys_m68k
#define stq_le_phys_cached stq_le_phys_cached_m68k
#define stq_phys stq_phys_m68k
#define stq_phys_cached stq_phys_cached_m68k
#define string_input_get_visitor string_input_get_visitor_m68k
#define string_input_visitor_cleanup string_input_visitor_cleanup_m68k
#define string_input_visitor_new string_input_visitor_new_m68k
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_m68k
#define strstart strstart_m68k
#define stw_be_p stw_be_p_m68k
#define stw_be_phys_cached stw_be_phys_cached_m68k
#define stw_be_phys stw_be_phys_m68k
#define stw_he_p stw_he_p_m68k
#define stw_le_p stw_le_p_m68k
#define stw_le_phys stw_le_phys_m68k
#define stw_le_phys_cached stw_le_phys_cached_m68k
#define stw_phys stw_phys_m68k
#define stw_phys_cached stw_phys_cached_m68k
#define stw_phys_internal stw_phys_internal_m68k
#define sub128 sub128_m68k
#define sub16_sat sub16_sat_m68k

45
qemu/mips.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_mips
#define add_qemu_ldst_label add_qemu_ldst_label_mips
#define address_space_access_valid address_space_access_valid_mips
#define address_space_cache_destroy address_space_cache_destroy_mips
#define address_space_cache_init address_space_cache_init_mips
#define address_space_cache_invalidate address_space_cache_invalidate_mips
#define address_space_destroy address_space_destroy_mips
#define address_space_destroy_dispatch address_space_destroy_dispatch_mips
#define address_space_get_flatview address_space_get_flatview_mips
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_mips
#define address_space_ldl address_space_ldl_mips
#define address_space_ldl_be address_space_ldl_be_mips
#define address_space_ldl_be_cached address_space_ldl_be_cached_mips
#define address_space_ldl_cached address_space_ldl_cached_mips
#define address_space_ldl_le address_space_ldl_le_mips
#define address_space_ldl_le_cached address_space_ldl_le_cached_mips
#define address_space_ldq address_space_ldq_mips
#define address_space_ldq_be address_space_ldq_be_mips
#define address_space_ldq_be_cached address_space_ldq_be_cached_mips
#define address_space_ldq_cached address_space_ldq_cached_mips
#define address_space_ldq_le address_space_ldq_le_mips
#define address_space_ldq_le_cached address_space_ldq_le_cached_mips
#define address_space_ldub address_space_ldub_mips
#define address_space_ldub_cached address_space_ldub_cached_mips
#define address_space_lduw address_space_lduw_mips
#define address_space_lduw_be address_space_lduw_be_mips
#define address_space_lduw_be_cached address_space_lduw_be_cached_mips
#define address_space_lduw_cached address_space_lduw_cached_mips
#define address_space_lduw_le address_space_lduw_le_mips
#define address_space_lduw_le_cached address_space_lduw_le_cached_mips
#define address_space_lookup_region address_space_lookup_region_mips
#define address_space_map address_space_map_mips
#define address_space_read address_space_read_mips
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_mips
#define address_space_rw address_space_rw_mips
#define address_space_stb address_space_stb_mips
#define address_space_stb_cached address_space_stb_cached_mips
#define address_space_stl address_space_stl_mips
#define address_space_stl_be address_space_stl_be_mips
#define address_space_stl_be_cached address_space_stl_be_cached_mips
#define address_space_stl_cached address_space_stl_cached_mips
#define address_space_stl_le address_space_stl_le_mips
#define address_space_stl_le_cached address_space_stl_le_cached_mips
#define address_space_stl_notdirty address_space_stl_notdirty_mips
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_mips
#define address_space_stq address_space_stq_mips
#define address_space_stq_be address_space_stq_be_mips
#define address_space_stq_be_cached address_space_stq_be_cached_mips
#define address_space_stq_cached address_space_stq_cached_mips
#define address_space_stq_le address_space_stq_le_mips
#define address_space_stq_le_cached address_space_stq_le_cached_mips
#define address_space_stw address_space_stw_mips
#define address_space_stw_be address_space_stw_be_mips
#define address_space_stw_be_cached address_space_stw_be_cached_mips
#define address_space_stw_cached address_space_stw_cached_mips
#define address_space_stw_le address_space_stw_le_mips
#define address_space_stw_le_cached address_space_stw_le_cached_mips
#define address_space_translate address_space_translate_mips
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips
#define address_space_translate_internal address_space_translate_internal_mips
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_mips
#define ldl_be_p ldl_be_p_mips
#define ldl_be_phys ldl_be_phys_mips
#define ldl_be_phys_cached ldl_be_phys_cached_mips
#define ldl_he_p ldl_he_p_mips
#define ldl_le_p ldl_le_p_mips
#define ldl_le_phys ldl_le_phys_mips
#define ldl_le_phys_cached ldl_le_phys_cached_mips
#define ldl_phys ldl_phys_mips
#define ldl_phys_cached ldl_phys_cached_mips
#define ldl_phys_internal ldl_phys_internal_mips
#define ldq_be_p ldq_be_p_mips
#define ldq_be_phys ldq_be_phys_mips
#define ldq_be_phys_cached ldq_be_phys_cached_mips
#define ldq_he_p ldq_he_p_mips
#define ldq_le_p ldq_le_p_mips
#define ldq_le_phys ldq_le_phys_mips
#define ldq_le_phys_cached ldq_le_phys_cached_mips
#define ldq_phys ldq_phys_mips
#define ldq_phys_cached ldq_phys_cached_mips
#define ldq_phys_internal ldq_phys_internal_mips
#define ldst_name ldst_name_mips
#define ldub_p ldub_p_mips
#define ldub_phys ldub_phys_mips
#define ldub_phys_cached ldub_phys_cached_mips
#define lduw_be_p lduw_be_p_mips
#define lduw_be_phys lduw_be_phys_mips
#define lduw_be_phys_cached lduw_be_phys_cached_mips
#define lduw_he_p lduw_he_p_mips
#define lduw_le_p lduw_le_p_mips
#define lduw_le_phys lduw_le_phys_mips
#define lduw_le_phys_cached lduw_le_phys_cached_mips
#define lduw_phys lduw_phys_mips
#define lduw_phys_cached lduw_phys_cached_mips
#define lduw_phys_internal lduw_phys_internal_mips
#define le128 le128_mips
#define linked_bp_matches linked_bp_matches_mips
@ -2790,24 +2824,32 @@
#define start_list start_list_mips
#define stb_p stb_p_mips
#define stb_phys stb_phys_mips
#define stb_phys_cached stb_phys_cached_mips
#define stl_be_p stl_be_p_mips
#define stl_be_phys stl_be_phys_mips
#define stl_be_phys_cached stl_be_phys_cached_mips
#define stl_he_p stl_he_p_mips
#define stl_le_p stl_le_p_mips
#define stl_le_phys stl_le_phys_mips
#define stl_le_phys_cached stl_le_phys_cached_mips
#define stl_phys stl_phys_mips
#define stl_phys_cached stl_phys_cached_mips
#define stl_phys_internal stl_phys_internal_mips
#define stl_phys_notdirty stl_phys_notdirty_mips
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_mips
#define store_cpu_offset store_cpu_offset_mips
#define store_reg store_reg_mips
#define store_reg_bx store_reg_bx_mips
#define store_reg_from_load store_reg_from_load_mips
#define stq_be_p stq_be_p_mips
#define stq_be_phys stq_be_phys_mips
#define stq_be_phys_cached stq_be_phys_cached_mips
#define stq_he_p stq_he_p_mips
#define stq_le_p stq_le_p_mips
#define stq_le_phys stq_le_phys_mips
#define stq_le_phys_cached stq_le_phys_cached_mips
#define stq_phys stq_phys_mips
#define stq_phys_cached stq_phys_cached_mips
#define string_input_get_visitor string_input_get_visitor_mips
#define string_input_visitor_cleanup string_input_visitor_cleanup_mips
#define string_input_visitor_new string_input_visitor_new_mips
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_mips
#define strstart strstart_mips
#define stw_be_p stw_be_p_mips
#define stw_be_phys_cached stw_be_phys_cached_mips
#define stw_be_phys stw_be_phys_mips
#define stw_he_p stw_he_p_mips
#define stw_le_p stw_le_p_mips
#define stw_le_phys stw_le_phys_mips
#define stw_le_phys_cached stw_le_phys_cached_mips
#define stw_phys stw_phys_mips
#define stw_phys_cached stw_phys_cached_mips
#define stw_phys_internal stw_phys_internal_mips
#define sub128 sub128_mips
#define sub16_sat sub16_sat_mips

45
qemu/mips64.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_mips64
#define add_qemu_ldst_label add_qemu_ldst_label_mips64
#define address_space_access_valid address_space_access_valid_mips64
#define address_space_cache_destroy address_space_cache_destroy_mips64
#define address_space_cache_init address_space_cache_init_mips64
#define address_space_cache_invalidate address_space_cache_invalidate_mips64
#define address_space_destroy address_space_destroy_mips64
#define address_space_destroy_dispatch address_space_destroy_dispatch_mips64
#define address_space_get_flatview address_space_get_flatview_mips64
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_mips64
#define address_space_ldl address_space_ldl_mips64
#define address_space_ldl_be address_space_ldl_be_mips64
#define address_space_ldl_be_cached address_space_ldl_be_cached_mips64
#define address_space_ldl_cached address_space_ldl_cached_mips64
#define address_space_ldl_le address_space_ldl_le_mips64
#define address_space_ldl_le_cached address_space_ldl_le_cached_mips64
#define address_space_ldq address_space_ldq_mips64
#define address_space_ldq_be address_space_ldq_be_mips64
#define address_space_ldq_be_cached address_space_ldq_be_cached_mips64
#define address_space_ldq_cached address_space_ldq_cached_mips64
#define address_space_ldq_le address_space_ldq_le_mips64
#define address_space_ldq_le_cached address_space_ldq_le_cached_mips64
#define address_space_ldub address_space_ldub_mips64
#define address_space_ldub_cached address_space_ldub_cached_mips64
#define address_space_lduw address_space_lduw_mips64
#define address_space_lduw_be address_space_lduw_be_mips64
#define address_space_lduw_be_cached address_space_lduw_be_cached_mips64
#define address_space_lduw_cached address_space_lduw_cached_mips64
#define address_space_lduw_le address_space_lduw_le_mips64
#define address_space_lduw_le_cached address_space_lduw_le_cached_mips64
#define address_space_lookup_region address_space_lookup_region_mips64
#define address_space_map address_space_map_mips64
#define address_space_read address_space_read_mips64
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_mips64
#define address_space_rw address_space_rw_mips64
#define address_space_stb address_space_stb_mips64
#define address_space_stb_cached address_space_stb_cached_mips64
#define address_space_stl address_space_stl_mips64
#define address_space_stl_be address_space_stl_be_mips64
#define address_space_stl_be_cached address_space_stl_be_cached_mips64
#define address_space_stl_cached address_space_stl_cached_mips64
#define address_space_stl_le address_space_stl_le_mips64
#define address_space_stl_le_cached address_space_stl_le_cached_mips64
#define address_space_stl_notdirty address_space_stl_notdirty_mips64
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_mips64
#define address_space_stq address_space_stq_mips64
#define address_space_stq_be address_space_stq_be_mips64
#define address_space_stq_be_cached address_space_stq_be_cached_mips64
#define address_space_stq_cached address_space_stq_cached_mips64
#define address_space_stq_le address_space_stq_le_mips64
#define address_space_stq_le_cached address_space_stq_le_cached_mips64
#define address_space_stw address_space_stw_mips64
#define address_space_stw_be address_space_stw_be_mips64
#define address_space_stw_be_cached address_space_stw_be_cached_mips64
#define address_space_stw_cached address_space_stw_cached_mips64
#define address_space_stw_le address_space_stw_le_mips64
#define address_space_stw_le_cached address_space_stw_le_cached_mips64
#define address_space_translate address_space_translate_mips64
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64
#define address_space_translate_internal address_space_translate_internal_mips64
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_mips64
#define ldl_be_p ldl_be_p_mips64
#define ldl_be_phys ldl_be_phys_mips64
#define ldl_be_phys_cached ldl_be_phys_cached_mips64
#define ldl_he_p ldl_he_p_mips64
#define ldl_le_p ldl_le_p_mips64
#define ldl_le_phys ldl_le_phys_mips64
#define ldl_le_phys_cached ldl_le_phys_cached_mips64
#define ldl_phys ldl_phys_mips64
#define ldl_phys_cached ldl_phys_cached_mips64
#define ldl_phys_internal ldl_phys_internal_mips64
#define ldq_be_p ldq_be_p_mips64
#define ldq_be_phys ldq_be_phys_mips64
#define ldq_be_phys_cached ldq_be_phys_cached_mips64
#define ldq_he_p ldq_he_p_mips64
#define ldq_le_p ldq_le_p_mips64
#define ldq_le_phys ldq_le_phys_mips64
#define ldq_le_phys_cached ldq_le_phys_cached_mips64
#define ldq_phys ldq_phys_mips64
#define ldq_phys_cached ldq_phys_cached_mips64
#define ldq_phys_internal ldq_phys_internal_mips64
#define ldst_name ldst_name_mips64
#define ldub_p ldub_p_mips64
#define ldub_phys ldub_phys_mips64
#define ldub_phys_cached ldub_phys_cached_mips64
#define lduw_be_p lduw_be_p_mips64
#define lduw_be_phys lduw_be_phys_mips64
#define lduw_be_phys_cached lduw_be_phys_cached_mips64
#define lduw_he_p lduw_he_p_mips64
#define lduw_le_p lduw_le_p_mips64
#define lduw_le_phys lduw_le_phys_mips64
#define lduw_le_phys_cached lduw_le_phys_cached_mips64
#define lduw_phys lduw_phys_mips64
#define lduw_phys_cached lduw_phys_cached_mips64
#define lduw_phys_internal lduw_phys_internal_mips64
#define le128 le128_mips64
#define linked_bp_matches linked_bp_matches_mips64
@ -2790,24 +2824,32 @@
#define start_list start_list_mips64
#define stb_p stb_p_mips64
#define stb_phys stb_phys_mips64
#define stb_phys_cached stb_phys_cached_mips64
#define stl_be_p stl_be_p_mips64
#define stl_be_phys stl_be_phys_mips64
#define stl_be_phys_cached stl_be_phys_cached_mips64
#define stl_he_p stl_he_p_mips64
#define stl_le_p stl_le_p_mips64
#define stl_le_phys stl_le_phys_mips64
#define stl_le_phys_cached stl_le_phys_cached_mips64
#define stl_phys stl_phys_mips64
#define stl_phys_cached stl_phys_cached_mips64
#define stl_phys_internal stl_phys_internal_mips64
#define stl_phys_notdirty stl_phys_notdirty_mips64
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_mips64
#define store_cpu_offset store_cpu_offset_mips64
#define store_reg store_reg_mips64
#define store_reg_bx store_reg_bx_mips64
#define store_reg_from_load store_reg_from_load_mips64
#define stq_be_p stq_be_p_mips64
#define stq_be_phys stq_be_phys_mips64
#define stq_be_phys_cached stq_be_phys_cached_mips64
#define stq_he_p stq_he_p_mips64
#define stq_le_p stq_le_p_mips64
#define stq_le_phys stq_le_phys_mips64
#define stq_le_phys_cached stq_le_phys_cached_mips64
#define stq_phys stq_phys_mips64
#define stq_phys_cached stq_phys_cached_mips64
#define string_input_get_visitor string_input_get_visitor_mips64
#define string_input_visitor_cleanup string_input_visitor_cleanup_mips64
#define string_input_visitor_new string_input_visitor_new_mips64
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_mips64
#define strstart strstart_mips64
#define stw_be_p stw_be_p_mips64
#define stw_be_phys_cached stw_be_phys_cached_mips64
#define stw_be_phys stw_be_phys_mips64
#define stw_he_p stw_he_p_mips64
#define stw_le_p stw_le_p_mips64
#define stw_le_phys stw_le_phys_mips64
#define stw_le_phys_cached stw_le_phys_cached_mips64
#define stw_phys stw_phys_mips64
#define stw_phys_cached stw_phys_cached_mips64
#define stw_phys_internal stw_phys_internal_mips64
#define sub128 sub128_mips64
#define sub16_sat sub16_sat_mips64

45
qemu/mips64el.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_mips64el
#define add_qemu_ldst_label add_qemu_ldst_label_mips64el
#define address_space_access_valid address_space_access_valid_mips64el
#define address_space_cache_destroy address_space_cache_destroy_mips64el
#define address_space_cache_init address_space_cache_init_mips64el
#define address_space_cache_invalidate address_space_cache_invalidate_mips64el
#define address_space_destroy address_space_destroy_mips64el
#define address_space_destroy_dispatch address_space_destroy_dispatch_mips64el
#define address_space_get_flatview address_space_get_flatview_mips64el
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_mips64el
#define address_space_ldl address_space_ldl_mips64el
#define address_space_ldl_be address_space_ldl_be_mips64el
#define address_space_ldl_be_cached address_space_ldl_be_cached_mips64el
#define address_space_ldl_cached address_space_ldl_cached_mips64el
#define address_space_ldl_le address_space_ldl_le_mips64el
#define address_space_ldl_le_cached address_space_ldl_le_cached_mips64el
#define address_space_ldq address_space_ldq_mips64el
#define address_space_ldq_be address_space_ldq_be_mips64el
#define address_space_ldq_be_cached address_space_ldq_be_cached_mips64el
#define address_space_ldq_cached address_space_ldq_cached_mips64el
#define address_space_ldq_le address_space_ldq_le_mips64el
#define address_space_ldq_le_cached address_space_ldq_le_cached_mips64el
#define address_space_ldub address_space_ldub_mips64el
#define address_space_ldub_cached address_space_ldub_cached_mips64el
#define address_space_lduw address_space_lduw_mips64el
#define address_space_lduw_be address_space_lduw_be_mips64el
#define address_space_lduw_be_cached address_space_lduw_be_cached_mips64el
#define address_space_lduw_cached address_space_lduw_cached_mips64el
#define address_space_lduw_le address_space_lduw_le_mips64el
#define address_space_lduw_le_cached address_space_lduw_le_cached_mips64el
#define address_space_lookup_region address_space_lookup_region_mips64el
#define address_space_map address_space_map_mips64el
#define address_space_read address_space_read_mips64el
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_mips64el
#define address_space_rw address_space_rw_mips64el
#define address_space_stb address_space_stb_mips64el
#define address_space_stb_cached address_space_stb_cached_mips64el
#define address_space_stl address_space_stl_mips64el
#define address_space_stl_be address_space_stl_be_mips64el
#define address_space_stl_be_cached address_space_stl_be_cached_mips64el
#define address_space_stl_cached address_space_stl_cached_mips64el
#define address_space_stl_le address_space_stl_le_mips64el
#define address_space_stl_le_cached address_space_stl_le_cached_mips64el
#define address_space_stl_notdirty address_space_stl_notdirty_mips64el
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_mips64el
#define address_space_stq address_space_stq_mips64el
#define address_space_stq_be address_space_stq_be_mips64el
#define address_space_stq_be_cached address_space_stq_be_cached_mips64el
#define address_space_stq_cached address_space_stq_cached_mips64el
#define address_space_stq_le address_space_stq_le_mips64el
#define address_space_stq_le_cached address_space_stq_le_cached_mips64el
#define address_space_stw address_space_stw_mips64el
#define address_space_stw_be address_space_stw_be_mips64el
#define address_space_stw_be_cached address_space_stw_be_cached_mips64el
#define address_space_stw_cached address_space_stw_cached_mips64el
#define address_space_stw_le address_space_stw_le_mips64el
#define address_space_stw_le_cached address_space_stw_le_cached_mips64el
#define address_space_translate address_space_translate_mips64el
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mips64el
#define address_space_translate_internal address_space_translate_internal_mips64el
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_mips64el
#define ldl_be_p ldl_be_p_mips64el
#define ldl_be_phys ldl_be_phys_mips64el
#define ldl_be_phys_cached ldl_be_phys_cached_mips64el
#define ldl_he_p ldl_he_p_mips64el
#define ldl_le_p ldl_le_p_mips64el
#define ldl_le_phys ldl_le_phys_mips64el
#define ldl_le_phys_cached ldl_le_phys_cached_mips64el
#define ldl_phys ldl_phys_mips64el
#define ldl_phys_cached ldl_phys_cached_mips64el
#define ldl_phys_internal ldl_phys_internal_mips64el
#define ldq_be_p ldq_be_p_mips64el
#define ldq_be_phys ldq_be_phys_mips64el
#define ldq_be_phys_cached ldq_be_phys_cached_mips64el
#define ldq_he_p ldq_he_p_mips64el
#define ldq_le_p ldq_le_p_mips64el
#define ldq_le_phys ldq_le_phys_mips64el
#define ldq_le_phys_cached ldq_le_phys_cached_mips64el
#define ldq_phys ldq_phys_mips64el
#define ldq_phys_cached ldq_phys_cached_mips64el
#define ldq_phys_internal ldq_phys_internal_mips64el
#define ldst_name ldst_name_mips64el
#define ldub_p ldub_p_mips64el
#define ldub_phys ldub_phys_mips64el
#define ldub_phys_cached ldub_phys_cached_mips64el
#define lduw_be_p lduw_be_p_mips64el
#define lduw_be_phys lduw_be_phys_mips64el
#define lduw_be_phys_cached lduw_be_phys_cached_mips64el
#define lduw_he_p lduw_he_p_mips64el
#define lduw_le_p lduw_le_p_mips64el
#define lduw_le_phys lduw_le_phys_mips64el
#define lduw_le_phys_cached lduw_le_phys_cached_mips64el
#define lduw_phys lduw_phys_mips64el
#define lduw_phys_cached lduw_phys_cached_mips64el
#define lduw_phys_internal lduw_phys_internal_mips64el
#define le128 le128_mips64el
#define linked_bp_matches linked_bp_matches_mips64el
@ -2790,24 +2824,32 @@
#define start_list start_list_mips64el
#define stb_p stb_p_mips64el
#define stb_phys stb_phys_mips64el
#define stb_phys_cached stb_phys_cached_mips64el
#define stl_be_p stl_be_p_mips64el
#define stl_be_phys stl_be_phys_mips64el
#define stl_be_phys_cached stl_be_phys_cached_mips64el
#define stl_he_p stl_he_p_mips64el
#define stl_le_p stl_le_p_mips64el
#define stl_le_phys stl_le_phys_mips64el
#define stl_le_phys_cached stl_le_phys_cached_mips64el
#define stl_phys stl_phys_mips64el
#define stl_phys_cached stl_phys_cached_mips64el
#define stl_phys_internal stl_phys_internal_mips64el
#define stl_phys_notdirty stl_phys_notdirty_mips64el
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_mips64el
#define store_cpu_offset store_cpu_offset_mips64el
#define store_reg store_reg_mips64el
#define store_reg_bx store_reg_bx_mips64el
#define store_reg_from_load store_reg_from_load_mips64el
#define stq_be_p stq_be_p_mips64el
#define stq_be_phys stq_be_phys_mips64el
#define stq_be_phys_cached stq_be_phys_cached_mips64el
#define stq_he_p stq_he_p_mips64el
#define stq_le_p stq_le_p_mips64el
#define stq_le_phys stq_le_phys_mips64el
#define stq_le_phys_cached stq_le_phys_cached_mips64el
#define stq_phys stq_phys_mips64el
#define stq_phys_cached stq_phys_cached_mips64el
#define string_input_get_visitor string_input_get_visitor_mips64el
#define string_input_visitor_cleanup string_input_visitor_cleanup_mips64el
#define string_input_visitor_new string_input_visitor_new_mips64el
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_mips64el
#define strstart strstart_mips64el
#define stw_be_p stw_be_p_mips64el
#define stw_be_phys_cached stw_be_phys_cached_mips64el
#define stw_be_phys stw_be_phys_mips64el
#define stw_he_p stw_he_p_mips64el
#define stw_le_p stw_le_p_mips64el
#define stw_le_phys stw_le_phys_mips64el
#define stw_le_phys_cached stw_le_phys_cached_mips64el
#define stw_phys stw_phys_mips64el
#define stw_phys_cached stw_phys_cached_mips64el
#define stw_phys_internal stw_phys_internal_mips64el
#define sub128 sub128_mips64el
#define sub16_sat sub16_sat_mips64el

45
qemu/mipsel.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_mipsel
#define add_qemu_ldst_label add_qemu_ldst_label_mipsel
#define address_space_access_valid address_space_access_valid_mipsel
#define address_space_cache_destroy address_space_cache_destroy_mipsel
#define address_space_cache_init address_space_cache_init_mipsel
#define address_space_cache_invalidate address_space_cache_invalidate_mipsel
#define address_space_destroy address_space_destroy_mipsel
#define address_space_destroy_dispatch address_space_destroy_dispatch_mipsel
#define address_space_get_flatview address_space_get_flatview_mipsel
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_mipsel
#define address_space_ldl address_space_ldl_mipsel
#define address_space_ldl_be address_space_ldl_be_mipsel
#define address_space_ldl_be_cached address_space_ldl_be_cached_mipsel
#define address_space_ldl_cached address_space_ldl_cached_mipsel
#define address_space_ldl_le address_space_ldl_le_mipsel
#define address_space_ldl_le_cached address_space_ldl_le_cached_mipsel
#define address_space_ldq address_space_ldq_mipsel
#define address_space_ldq_be address_space_ldq_be_mipsel
#define address_space_ldq_be_cached address_space_ldq_be_cached_mipsel
#define address_space_ldq_cached address_space_ldq_cached_mipsel
#define address_space_ldq_le address_space_ldq_le_mipsel
#define address_space_ldq_le_cached address_space_ldq_le_cached_mipsel
#define address_space_ldub address_space_ldub_mipsel
#define address_space_ldub_cached address_space_ldub_cached_mipsel
#define address_space_lduw address_space_lduw_mipsel
#define address_space_lduw_be address_space_lduw_be_mipsel
#define address_space_lduw_be_cached address_space_lduw_be_cached_mipsel
#define address_space_lduw_cached address_space_lduw_cached_mipsel
#define address_space_lduw_le address_space_lduw_le_mipsel
#define address_space_lduw_le_cached address_space_lduw_le_cached_mipsel
#define address_space_lookup_region address_space_lookup_region_mipsel
#define address_space_map address_space_map_mipsel
#define address_space_read address_space_read_mipsel
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_mipsel
#define address_space_rw address_space_rw_mipsel
#define address_space_stb address_space_stb_mipsel
#define address_space_stb_cached address_space_stb_cached_mipsel
#define address_space_stl address_space_stl_mipsel
#define address_space_stl_be address_space_stl_be_mipsel
#define address_space_stl_be_cached address_space_stl_be_cached_mipsel
#define address_space_stl_cached address_space_stl_cached_mipsel
#define address_space_stl_le address_space_stl_le_mipsel
#define address_space_stl_le_cached address_space_stl_le_cached_mipsel
#define address_space_stl_notdirty address_space_stl_notdirty_mipsel
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_mipsel
#define address_space_stq address_space_stq_mipsel
#define address_space_stq_be address_space_stq_be_mipsel
#define address_space_stq_be_cached address_space_stq_be_cached_mipsel
#define address_space_stq_cached address_space_stq_cached_mipsel
#define address_space_stq_le address_space_stq_le_mipsel
#define address_space_stq_le_cached address_space_stq_le_cached_mipsel
#define address_space_stw address_space_stw_mipsel
#define address_space_stw_be address_space_stw_be_mipsel
#define address_space_stw_be_cached address_space_stw_be_cached_mipsel
#define address_space_stw_cached address_space_stw_cached_mipsel
#define address_space_stw_le address_space_stw_le_mipsel
#define address_space_stw_le_cached address_space_stw_le_cached_mipsel
#define address_space_translate address_space_translate_mipsel
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_mipsel
#define address_space_translate_internal address_space_translate_internal_mipsel
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_mipsel
#define ldl_be_p ldl_be_p_mipsel
#define ldl_be_phys ldl_be_phys_mipsel
#define ldl_be_phys_cached ldl_be_phys_cached_mipsel
#define ldl_he_p ldl_he_p_mipsel
#define ldl_le_p ldl_le_p_mipsel
#define ldl_le_phys ldl_le_phys_mipsel
#define ldl_le_phys_cached ldl_le_phys_cached_mipsel
#define ldl_phys ldl_phys_mipsel
#define ldl_phys_cached ldl_phys_cached_mipsel
#define ldl_phys_internal ldl_phys_internal_mipsel
#define ldq_be_p ldq_be_p_mipsel
#define ldq_be_phys ldq_be_phys_mipsel
#define ldq_be_phys_cached ldq_be_phys_cached_mipsel
#define ldq_he_p ldq_he_p_mipsel
#define ldq_le_p ldq_le_p_mipsel
#define ldq_le_phys ldq_le_phys_mipsel
#define ldq_le_phys_cached ldq_le_phys_cached_mipsel
#define ldq_phys ldq_phys_mipsel
#define ldq_phys_cached ldq_phys_cached_mipsel
#define ldq_phys_internal ldq_phys_internal_mipsel
#define ldst_name ldst_name_mipsel
#define ldub_p ldub_p_mipsel
#define ldub_phys ldub_phys_mipsel
#define ldub_phys_cached ldub_phys_cached_mipsel
#define lduw_be_p lduw_be_p_mipsel
#define lduw_be_phys lduw_be_phys_mipsel
#define lduw_be_phys_cached lduw_be_phys_cached_mipsel
#define lduw_he_p lduw_he_p_mipsel
#define lduw_le_p lduw_le_p_mipsel
#define lduw_le_phys lduw_le_phys_mipsel
#define lduw_le_phys_cached lduw_le_phys_cached_mipsel
#define lduw_phys lduw_phys_mipsel
#define lduw_phys_cached lduw_phys_cached_mipsel
#define lduw_phys_internal lduw_phys_internal_mipsel
#define le128 le128_mipsel
#define linked_bp_matches linked_bp_matches_mipsel
@ -2790,24 +2824,32 @@
#define start_list start_list_mipsel
#define stb_p stb_p_mipsel
#define stb_phys stb_phys_mipsel
#define stb_phys_cached stb_phys_cached_mipsel
#define stl_be_p stl_be_p_mipsel
#define stl_be_phys stl_be_phys_mipsel
#define stl_be_phys_cached stl_be_phys_cached_mipsel
#define stl_he_p stl_he_p_mipsel
#define stl_le_p stl_le_p_mipsel
#define stl_le_phys stl_le_phys_mipsel
#define stl_le_phys_cached stl_le_phys_cached_mipsel
#define stl_phys stl_phys_mipsel
#define stl_phys_cached stl_phys_cached_mipsel
#define stl_phys_internal stl_phys_internal_mipsel
#define stl_phys_notdirty stl_phys_notdirty_mipsel
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_mipsel
#define store_cpu_offset store_cpu_offset_mipsel
#define store_reg store_reg_mipsel
#define store_reg_bx store_reg_bx_mipsel
#define store_reg_from_load store_reg_from_load_mipsel
#define stq_be_p stq_be_p_mipsel
#define stq_be_phys stq_be_phys_mipsel
#define stq_be_phys_cached stq_be_phys_cached_mipsel
#define stq_he_p stq_he_p_mipsel
#define stq_le_p stq_le_p_mipsel
#define stq_le_phys stq_le_phys_mipsel
#define stq_le_phys_cached stq_le_phys_cached_mipsel
#define stq_phys stq_phys_mipsel
#define stq_phys_cached stq_phys_cached_mipsel
#define string_input_get_visitor string_input_get_visitor_mipsel
#define string_input_visitor_cleanup string_input_visitor_cleanup_mipsel
#define string_input_visitor_new string_input_visitor_new_mipsel
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_mipsel
#define strstart strstart_mipsel
#define stw_be_p stw_be_p_mipsel
#define stw_be_phys_cached stw_be_phys_cached_mipsel
#define stw_be_phys stw_be_phys_mipsel
#define stw_he_p stw_he_p_mipsel
#define stw_le_p stw_le_p_mipsel
#define stw_le_phys stw_le_phys_mipsel
#define stw_le_phys_cached stw_le_phys_cached_mipsel
#define stw_phys stw_phys_mipsel
#define stw_phys_cached stw_phys_cached_mipsel
#define stw_phys_internal stw_phys_internal_mipsel
#define sub128 sub128_mipsel
#define sub16_sat sub16_sat_mipsel

45
qemu/powerpc.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_powerpc
#define add_qemu_ldst_label add_qemu_ldst_label_powerpc
#define address_space_access_valid address_space_access_valid_powerpc
#define address_space_cache_destroy address_space_cache_destroy_powerpc
#define address_space_cache_init address_space_cache_init_powerpc
#define address_space_cache_invalidate address_space_cache_invalidate_powerpc
#define address_space_destroy address_space_destroy_powerpc
#define address_space_destroy_dispatch address_space_destroy_dispatch_powerpc
#define address_space_get_flatview address_space_get_flatview_powerpc
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_powerpc
#define address_space_ldl address_space_ldl_powerpc
#define address_space_ldl_be address_space_ldl_be_powerpc
#define address_space_ldl_be_cached address_space_ldl_be_cached_powerpc
#define address_space_ldl_cached address_space_ldl_cached_powerpc
#define address_space_ldl_le address_space_ldl_le_powerpc
#define address_space_ldl_le_cached address_space_ldl_le_cached_powerpc
#define address_space_ldq address_space_ldq_powerpc
#define address_space_ldq_be address_space_ldq_be_powerpc
#define address_space_ldq_be_cached address_space_ldq_be_cached_powerpc
#define address_space_ldq_cached address_space_ldq_cached_powerpc
#define address_space_ldq_le address_space_ldq_le_powerpc
#define address_space_ldq_le_cached address_space_ldq_le_cached_powerpc
#define address_space_ldub address_space_ldub_powerpc
#define address_space_ldub_cached address_space_ldub_cached_powerpc
#define address_space_lduw address_space_lduw_powerpc
#define address_space_lduw_be address_space_lduw_be_powerpc
#define address_space_lduw_be_cached address_space_lduw_be_cached_powerpc
#define address_space_lduw_cached address_space_lduw_cached_powerpc
#define address_space_lduw_le address_space_lduw_le_powerpc
#define address_space_lduw_le_cached address_space_lduw_le_cached_powerpc
#define address_space_lookup_region address_space_lookup_region_powerpc
#define address_space_map address_space_map_powerpc
#define address_space_read address_space_read_powerpc
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_powerpc
#define address_space_rw address_space_rw_powerpc
#define address_space_stb address_space_stb_powerpc
#define address_space_stb_cached address_space_stb_cached_powerpc
#define address_space_stl address_space_stl_powerpc
#define address_space_stl_be address_space_stl_be_powerpc
#define address_space_stl_be_cached address_space_stl_be_cached_powerpc
#define address_space_stl_cached address_space_stl_cached_powerpc
#define address_space_stl_le address_space_stl_le_powerpc
#define address_space_stl_le_cached address_space_stl_le_cached_powerpc
#define address_space_stl_notdirty address_space_stl_notdirty_powerpc
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_powerpc
#define address_space_stq address_space_stq_powerpc
#define address_space_stq_be address_space_stq_be_powerpc
#define address_space_stq_be_cached address_space_stq_be_cached_powerpc
#define address_space_stq_cached address_space_stq_cached_powerpc
#define address_space_stq_le address_space_stq_le_powerpc
#define address_space_stq_le_cached address_space_stq_le_cached_powerpc
#define address_space_stw address_space_stw_powerpc
#define address_space_stw_be address_space_stw_be_powerpc
#define address_space_stw_be_cached address_space_stw_be_cached_powerpc
#define address_space_stw_cached address_space_stw_cached_powerpc
#define address_space_stw_le address_space_stw_le_powerpc
#define address_space_stw_le_cached address_space_stw_le_cached_powerpc
#define address_space_translate address_space_translate_powerpc
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_powerpc
#define address_space_translate_internal address_space_translate_internal_powerpc
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_powerpc
#define ldl_be_p ldl_be_p_powerpc
#define ldl_be_phys ldl_be_phys_powerpc
#define ldl_be_phys_cached ldl_be_phys_cached_powerpc
#define ldl_he_p ldl_he_p_powerpc
#define ldl_le_p ldl_le_p_powerpc
#define ldl_le_phys ldl_le_phys_powerpc
#define ldl_le_phys_cached ldl_le_phys_cached_powerpc
#define ldl_phys ldl_phys_powerpc
#define ldl_phys_cached ldl_phys_cached_powerpc
#define ldl_phys_internal ldl_phys_internal_powerpc
#define ldq_be_p ldq_be_p_powerpc
#define ldq_be_phys ldq_be_phys_powerpc
#define ldq_be_phys_cached ldq_be_phys_cached_powerpc
#define ldq_he_p ldq_he_p_powerpc
#define ldq_le_p ldq_le_p_powerpc
#define ldq_le_phys ldq_le_phys_powerpc
#define ldq_le_phys_cached ldq_le_phys_cached_powerpc
#define ldq_phys ldq_phys_powerpc
#define ldq_phys_cached ldq_phys_cached_powerpc
#define ldq_phys_internal ldq_phys_internal_powerpc
#define ldst_name ldst_name_powerpc
#define ldub_p ldub_p_powerpc
#define ldub_phys ldub_phys_powerpc
#define ldub_phys_cached ldub_phys_cached_powerpc
#define lduw_be_p lduw_be_p_powerpc
#define lduw_be_phys lduw_be_phys_powerpc
#define lduw_be_phys_cached lduw_be_phys_cached_powerpc
#define lduw_he_p lduw_he_p_powerpc
#define lduw_le_p lduw_le_p_powerpc
#define lduw_le_phys lduw_le_phys_powerpc
#define lduw_le_phys_cached lduw_le_phys_cached_powerpc
#define lduw_phys lduw_phys_powerpc
#define lduw_phys_cached lduw_phys_cached_powerpc
#define lduw_phys_internal lduw_phys_internal_powerpc
#define le128 le128_powerpc
#define linked_bp_matches linked_bp_matches_powerpc
@ -2790,24 +2824,32 @@
#define start_list start_list_powerpc
#define stb_p stb_p_powerpc
#define stb_phys stb_phys_powerpc
#define stb_phys_cached stb_phys_cached_powerpc
#define stl_be_p stl_be_p_powerpc
#define stl_be_phys stl_be_phys_powerpc
#define stl_be_phys_cached stl_be_phys_cached_powerpc
#define stl_he_p stl_he_p_powerpc
#define stl_le_p stl_le_p_powerpc
#define stl_le_phys stl_le_phys_powerpc
#define stl_le_phys_cached stl_le_phys_cached_powerpc
#define stl_phys stl_phys_powerpc
#define stl_phys_cached stl_phys_cached_powerpc
#define stl_phys_internal stl_phys_internal_powerpc
#define stl_phys_notdirty stl_phys_notdirty_powerpc
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_powerpc
#define store_cpu_offset store_cpu_offset_powerpc
#define store_reg store_reg_powerpc
#define store_reg_bx store_reg_bx_powerpc
#define store_reg_from_load store_reg_from_load_powerpc
#define stq_be_p stq_be_p_powerpc
#define stq_be_phys stq_be_phys_powerpc
#define stq_be_phys_cached stq_be_phys_cached_powerpc
#define stq_he_p stq_he_p_powerpc
#define stq_le_p stq_le_p_powerpc
#define stq_le_phys stq_le_phys_powerpc
#define stq_le_phys_cached stq_le_phys_cached_powerpc
#define stq_phys stq_phys_powerpc
#define stq_phys_cached stq_phys_cached_powerpc
#define string_input_get_visitor string_input_get_visitor_powerpc
#define string_input_visitor_cleanup string_input_visitor_cleanup_powerpc
#define string_input_visitor_new string_input_visitor_new_powerpc
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_powerpc
#define strstart strstart_powerpc
#define stw_be_p stw_be_p_powerpc
#define stw_be_phys_cached stw_be_phys_cached_powerpc
#define stw_be_phys stw_be_phys_powerpc
#define stw_he_p stw_he_p_powerpc
#define stw_le_p stw_le_p_powerpc
#define stw_le_phys stw_le_phys_powerpc
#define stw_le_phys_cached stw_le_phys_cached_powerpc
#define stw_phys stw_phys_powerpc
#define stw_phys_cached stw_phys_cached_powerpc
#define stw_phys_internal stw_phys_internal_powerpc
#define sub128 sub128_powerpc
#define sub16_sat sub16_sat_powerpc

45
qemu/sparc.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_sparc
#define add_qemu_ldst_label add_qemu_ldst_label_sparc
#define address_space_access_valid address_space_access_valid_sparc
#define address_space_cache_destroy address_space_cache_destroy_sparc
#define address_space_cache_init address_space_cache_init_sparc
#define address_space_cache_invalidate address_space_cache_invalidate_sparc
#define address_space_destroy address_space_destroy_sparc
#define address_space_destroy_dispatch address_space_destroy_dispatch_sparc
#define address_space_get_flatview address_space_get_flatview_sparc
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_sparc
#define address_space_ldl address_space_ldl_sparc
#define address_space_ldl_be address_space_ldl_be_sparc
#define address_space_ldl_be_cached address_space_ldl_be_cached_sparc
#define address_space_ldl_cached address_space_ldl_cached_sparc
#define address_space_ldl_le address_space_ldl_le_sparc
#define address_space_ldl_le_cached address_space_ldl_le_cached_sparc
#define address_space_ldq address_space_ldq_sparc
#define address_space_ldq_be address_space_ldq_be_sparc
#define address_space_ldq_be_cached address_space_ldq_be_cached_sparc
#define address_space_ldq_cached address_space_ldq_cached_sparc
#define address_space_ldq_le address_space_ldq_le_sparc
#define address_space_ldq_le_cached address_space_ldq_le_cached_sparc
#define address_space_ldub address_space_ldub_sparc
#define address_space_ldub_cached address_space_ldub_cached_sparc
#define address_space_lduw address_space_lduw_sparc
#define address_space_lduw_be address_space_lduw_be_sparc
#define address_space_lduw_be_cached address_space_lduw_be_cached_sparc
#define address_space_lduw_cached address_space_lduw_cached_sparc
#define address_space_lduw_le address_space_lduw_le_sparc
#define address_space_lduw_le_cached address_space_lduw_le_cached_sparc
#define address_space_lookup_region address_space_lookup_region_sparc
#define address_space_map address_space_map_sparc
#define address_space_read address_space_read_sparc
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_sparc
#define address_space_rw address_space_rw_sparc
#define address_space_stb address_space_stb_sparc
#define address_space_stb_cached address_space_stb_cached_sparc
#define address_space_stl address_space_stl_sparc
#define address_space_stl_be address_space_stl_be_sparc
#define address_space_stl_be_cached address_space_stl_be_cached_sparc
#define address_space_stl_cached address_space_stl_cached_sparc
#define address_space_stl_le address_space_stl_le_sparc
#define address_space_stl_le_cached address_space_stl_le_cached_sparc
#define address_space_stl_notdirty address_space_stl_notdirty_sparc
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_sparc
#define address_space_stq address_space_stq_sparc
#define address_space_stq_be address_space_stq_be_sparc
#define address_space_stq_be_cached address_space_stq_be_cached_sparc
#define address_space_stq_cached address_space_stq_cached_sparc
#define address_space_stq_le address_space_stq_le_sparc
#define address_space_stq_le_cached address_space_stq_le_cached_sparc
#define address_space_stw address_space_stw_sparc
#define address_space_stw_be address_space_stw_be_sparc
#define address_space_stw_be_cached address_space_stw_be_cached_sparc
#define address_space_stw_cached address_space_stw_cached_sparc
#define address_space_stw_le address_space_stw_le_sparc
#define address_space_stw_le_cached address_space_stw_le_cached_sparc
#define address_space_translate address_space_translate_sparc
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc
#define address_space_translate_internal address_space_translate_internal_sparc
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_sparc
#define ldl_be_p ldl_be_p_sparc
#define ldl_be_phys ldl_be_phys_sparc
#define ldl_be_phys_cached ldl_be_phys_cached_sparc
#define ldl_he_p ldl_he_p_sparc
#define ldl_le_p ldl_le_p_sparc
#define ldl_le_phys ldl_le_phys_sparc
#define ldl_le_phys_cached ldl_le_phys_cached_sparc
#define ldl_phys ldl_phys_sparc
#define ldl_phys_cached ldl_phys_cached_sparc
#define ldl_phys_internal ldl_phys_internal_sparc
#define ldq_be_p ldq_be_p_sparc
#define ldq_be_phys ldq_be_phys_sparc
#define ldq_be_phys_cached ldq_be_phys_cached_sparc
#define ldq_he_p ldq_he_p_sparc
#define ldq_le_p ldq_le_p_sparc
#define ldq_le_phys ldq_le_phys_sparc
#define ldq_le_phys_cached ldq_le_phys_cached_sparc
#define ldq_phys ldq_phys_sparc
#define ldq_phys_cached ldq_phys_cached_sparc
#define ldq_phys_internal ldq_phys_internal_sparc
#define ldst_name ldst_name_sparc
#define ldub_p ldub_p_sparc
#define ldub_phys ldub_phys_sparc
#define ldub_phys_cached ldub_phys_cached_sparc
#define lduw_be_p lduw_be_p_sparc
#define lduw_be_phys lduw_be_phys_sparc
#define lduw_be_phys_cached lduw_be_phys_cached_sparc
#define lduw_he_p lduw_he_p_sparc
#define lduw_le_p lduw_le_p_sparc
#define lduw_le_phys lduw_le_phys_sparc
#define lduw_le_phys_cached lduw_le_phys_cached_sparc
#define lduw_phys lduw_phys_sparc
#define lduw_phys_cached lduw_phys_cached_sparc
#define lduw_phys_internal lduw_phys_internal_sparc
#define le128 le128_sparc
#define linked_bp_matches linked_bp_matches_sparc
@ -2790,24 +2824,32 @@
#define start_list start_list_sparc
#define stb_p stb_p_sparc
#define stb_phys stb_phys_sparc
#define stb_phys_cached stb_phys_cached_sparc
#define stl_be_p stl_be_p_sparc
#define stl_be_phys stl_be_phys_sparc
#define stl_be_phys_cached stl_be_phys_cached_sparc
#define stl_he_p stl_he_p_sparc
#define stl_le_p stl_le_p_sparc
#define stl_le_phys stl_le_phys_sparc
#define stl_le_phys_cached stl_le_phys_cached_sparc
#define stl_phys stl_phys_sparc
#define stl_phys_cached stl_phys_cached_sparc
#define stl_phys_internal stl_phys_internal_sparc
#define stl_phys_notdirty stl_phys_notdirty_sparc
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_sparc
#define store_cpu_offset store_cpu_offset_sparc
#define store_reg store_reg_sparc
#define store_reg_bx store_reg_bx_sparc
#define store_reg_from_load store_reg_from_load_sparc
#define stq_be_p stq_be_p_sparc
#define stq_be_phys stq_be_phys_sparc
#define stq_be_phys_cached stq_be_phys_cached_sparc
#define stq_he_p stq_he_p_sparc
#define stq_le_p stq_le_p_sparc
#define stq_le_phys stq_le_phys_sparc
#define stq_le_phys_cached stq_le_phys_cached_sparc
#define stq_phys stq_phys_sparc
#define stq_phys_cached stq_phys_cached_sparc
#define string_input_get_visitor string_input_get_visitor_sparc
#define string_input_visitor_cleanup string_input_visitor_cleanup_sparc
#define string_input_visitor_new string_input_visitor_new_sparc
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_sparc
#define strstart strstart_sparc
#define stw_be_p stw_be_p_sparc
#define stw_be_phys_cached stw_be_phys_cached_sparc
#define stw_be_phys stw_be_phys_sparc
#define stw_he_p stw_he_p_sparc
#define stw_le_p stw_le_p_sparc
#define stw_le_phys stw_le_phys_sparc
#define stw_le_phys_cached stw_le_phys_cached_sparc
#define stw_phys stw_phys_sparc
#define stw_phys_cached stw_phys_cached_sparc
#define stw_phys_internal stw_phys_internal_sparc
#define sub128 sub128_sparc
#define sub16_sat sub16_sat_sparc

45
qemu/sparc64.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_sparc64
#define add_qemu_ldst_label add_qemu_ldst_label_sparc64
#define address_space_access_valid address_space_access_valid_sparc64
#define address_space_cache_destroy address_space_cache_destroy_sparc64
#define address_space_cache_init address_space_cache_init_sparc64
#define address_space_cache_invalidate address_space_cache_invalidate_sparc64
#define address_space_destroy address_space_destroy_sparc64
#define address_space_destroy_dispatch address_space_destroy_dispatch_sparc64
#define address_space_get_flatview address_space_get_flatview_sparc64
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_sparc64
#define address_space_ldl address_space_ldl_sparc64
#define address_space_ldl_be address_space_ldl_be_sparc64
#define address_space_ldl_be_cached address_space_ldl_be_cached_sparc64
#define address_space_ldl_cached address_space_ldl_cached_sparc64
#define address_space_ldl_le address_space_ldl_le_sparc64
#define address_space_ldl_le_cached address_space_ldl_le_cached_sparc64
#define address_space_ldq address_space_ldq_sparc64
#define address_space_ldq_be address_space_ldq_be_sparc64
#define address_space_ldq_be_cached address_space_ldq_be_cached_sparc64
#define address_space_ldq_cached address_space_ldq_cached_sparc64
#define address_space_ldq_le address_space_ldq_le_sparc64
#define address_space_ldq_le_cached address_space_ldq_le_cached_sparc64
#define address_space_ldub address_space_ldub_sparc64
#define address_space_ldub_cached address_space_ldub_cached_sparc64
#define address_space_lduw address_space_lduw_sparc64
#define address_space_lduw_be address_space_lduw_be_sparc64
#define address_space_lduw_be_cached address_space_lduw_be_cached_sparc64
#define address_space_lduw_cached address_space_lduw_cached_sparc64
#define address_space_lduw_le address_space_lduw_le_sparc64
#define address_space_lduw_le_cached address_space_lduw_le_cached_sparc64
#define address_space_lookup_region address_space_lookup_region_sparc64
#define address_space_map address_space_map_sparc64
#define address_space_read address_space_read_sparc64
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_sparc64
#define address_space_rw address_space_rw_sparc64
#define address_space_stb address_space_stb_sparc64
#define address_space_stb_cached address_space_stb_cached_sparc64
#define address_space_stl address_space_stl_sparc64
#define address_space_stl_be address_space_stl_be_sparc64
#define address_space_stl_be_cached address_space_stl_be_cached_sparc64
#define address_space_stl_cached address_space_stl_cached_sparc64
#define address_space_stl_le address_space_stl_le_sparc64
#define address_space_stl_le_cached address_space_stl_le_cached_sparc64
#define address_space_stl_notdirty address_space_stl_notdirty_sparc64
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_sparc64
#define address_space_stq address_space_stq_sparc64
#define address_space_stq_be address_space_stq_be_sparc64
#define address_space_stq_be_cached address_space_stq_be_cached_sparc64
#define address_space_stq_cached address_space_stq_cached_sparc64
#define address_space_stq_le address_space_stq_le_sparc64
#define address_space_stq_le_cached address_space_stq_le_cached_sparc64
#define address_space_stw address_space_stw_sparc64
#define address_space_stw_be address_space_stw_be_sparc64
#define address_space_stw_be_cached address_space_stw_be_cached_sparc64
#define address_space_stw_cached address_space_stw_cached_sparc64
#define address_space_stw_le address_space_stw_le_sparc64
#define address_space_stw_le_cached address_space_stw_le_cached_sparc64
#define address_space_translate address_space_translate_sparc64
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_sparc64
#define address_space_translate_internal address_space_translate_internal_sparc64
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_sparc64
#define ldl_be_p ldl_be_p_sparc64
#define ldl_be_phys ldl_be_phys_sparc64
#define ldl_be_phys_cached ldl_be_phys_cached_sparc64
#define ldl_he_p ldl_he_p_sparc64
#define ldl_le_p ldl_le_p_sparc64
#define ldl_le_phys ldl_le_phys_sparc64
#define ldl_le_phys_cached ldl_le_phys_cached_sparc64
#define ldl_phys ldl_phys_sparc64
#define ldl_phys_cached ldl_phys_cached_sparc64
#define ldl_phys_internal ldl_phys_internal_sparc64
#define ldq_be_p ldq_be_p_sparc64
#define ldq_be_phys ldq_be_phys_sparc64
#define ldq_be_phys_cached ldq_be_phys_cached_sparc64
#define ldq_he_p ldq_he_p_sparc64
#define ldq_le_p ldq_le_p_sparc64
#define ldq_le_phys ldq_le_phys_sparc64
#define ldq_le_phys_cached ldq_le_phys_cached_sparc64
#define ldq_phys ldq_phys_sparc64
#define ldq_phys_cached ldq_phys_cached_sparc64
#define ldq_phys_internal ldq_phys_internal_sparc64
#define ldst_name ldst_name_sparc64
#define ldub_p ldub_p_sparc64
#define ldub_phys ldub_phys_sparc64
#define ldub_phys_cached ldub_phys_cached_sparc64
#define lduw_be_p lduw_be_p_sparc64
#define lduw_be_phys lduw_be_phys_sparc64
#define lduw_be_phys_cached lduw_be_phys_cached_sparc64
#define lduw_he_p lduw_he_p_sparc64
#define lduw_le_p lduw_le_p_sparc64
#define lduw_le_phys lduw_le_phys_sparc64
#define lduw_le_phys_cached lduw_le_phys_cached_sparc64
#define lduw_phys lduw_phys_sparc64
#define lduw_phys_cached lduw_phys_cached_sparc64
#define lduw_phys_internal lduw_phys_internal_sparc64
#define le128 le128_sparc64
#define linked_bp_matches linked_bp_matches_sparc64
@ -2790,24 +2824,32 @@
#define start_list start_list_sparc64
#define stb_p stb_p_sparc64
#define stb_phys stb_phys_sparc64
#define stb_phys_cached stb_phys_cached_sparc64
#define stl_be_p stl_be_p_sparc64
#define stl_be_phys stl_be_phys_sparc64
#define stl_be_phys_cached stl_be_phys_cached_sparc64
#define stl_he_p stl_he_p_sparc64
#define stl_le_p stl_le_p_sparc64
#define stl_le_phys stl_le_phys_sparc64
#define stl_le_phys_cached stl_le_phys_cached_sparc64
#define stl_phys stl_phys_sparc64
#define stl_phys_cached stl_phys_cached_sparc64
#define stl_phys_internal stl_phys_internal_sparc64
#define stl_phys_notdirty stl_phys_notdirty_sparc64
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_sparc64
#define store_cpu_offset store_cpu_offset_sparc64
#define store_reg store_reg_sparc64
#define store_reg_bx store_reg_bx_sparc64
#define store_reg_from_load store_reg_from_load_sparc64
#define stq_be_p stq_be_p_sparc64
#define stq_be_phys stq_be_phys_sparc64
#define stq_be_phys_cached stq_be_phys_cached_sparc64
#define stq_he_p stq_he_p_sparc64
#define stq_le_p stq_le_p_sparc64
#define stq_le_phys stq_le_phys_sparc64
#define stq_le_phys_cached stq_le_phys_cached_sparc64
#define stq_phys stq_phys_sparc64
#define stq_phys_cached stq_phys_cached_sparc64
#define string_input_get_visitor string_input_get_visitor_sparc64
#define string_input_visitor_cleanup string_input_visitor_cleanup_sparc64
#define string_input_visitor_new string_input_visitor_new_sparc64
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_sparc64
#define strstart strstart_sparc64
#define stw_be_p stw_be_p_sparc64
#define stw_be_phys_cached stw_be_phys_cached_sparc64
#define stw_be_phys stw_be_phys_sparc64
#define stw_he_p stw_he_p_sparc64
#define stw_le_p stw_le_p_sparc64
#define stw_le_phys stw_le_phys_sparc64
#define stw_le_phys_cached stw_le_phys_cached_sparc64
#define stw_phys stw_phys_sparc64
#define stw_phys_cached stw_phys_cached_sparc64
#define stw_phys_internal stw_phys_internal_sparc64
#define sub128 sub128_sparc64
#define sub16_sat sub16_sat_sparc64

45
qemu/x86_64.h
View File

@ -50,6 +50,9 @@
#define add_cpreg_to_list add_cpreg_to_list_x86_64
#define add_qemu_ldst_label add_qemu_ldst_label_x86_64
#define address_space_access_valid address_space_access_valid_x86_64
#define address_space_cache_destroy address_space_cache_destroy_x86_64
#define address_space_cache_init address_space_cache_init_x86_64
#define address_space_cache_invalidate address_space_cache_invalidate_x86_64
#define address_space_destroy address_space_destroy_x86_64
#define address_space_destroy_dispatch address_space_destroy_dispatch_x86_64
#define address_space_get_flatview address_space_get_flatview_x86_64
@ -58,14 +61,24 @@
#define address_space_init_shareable address_space_init_shareable_x86_64
#define address_space_ldl address_space_ldl_x86_64
#define address_space_ldl_be address_space_ldl_be_x86_64
#define address_space_ldl_be_cached address_space_ldl_be_cached_x86_64
#define address_space_ldl_cached address_space_ldl_cached_x86_64
#define address_space_ldl_le address_space_ldl_le_x86_64
#define address_space_ldl_le_cached address_space_ldl_le_cached_x86_64
#define address_space_ldq address_space_ldq_x86_64
#define address_space_ldq_be address_space_ldq_be_x86_64
#define address_space_ldq_be_cached address_space_ldq_be_cached_x86_64
#define address_space_ldq_cached address_space_ldq_cached_x86_64
#define address_space_ldq_le address_space_ldq_le_x86_64
#define address_space_ldq_le_cached address_space_ldq_le_cached_x86_64
#define address_space_ldub address_space_ldub_x86_64
#define address_space_ldub_cached address_space_ldub_cached_x86_64
#define address_space_lduw address_space_lduw_x86_64
#define address_space_lduw_be address_space_lduw_be_x86_64
#define address_space_lduw_be_cached address_space_lduw_be_cached_x86_64
#define address_space_lduw_cached address_space_lduw_cached_x86_64
#define address_space_lduw_le address_space_lduw_le_x86_64
#define address_space_lduw_le_cached address_space_lduw_le_cached_x86_64
#define address_space_lookup_region address_space_lookup_region_x86_64
#define address_space_map address_space_map_x86_64
#define address_space_read address_space_read_x86_64
@ -73,16 +86,27 @@
#define address_space_read_full address_space_read_full_x86_64
#define address_space_rw address_space_rw_x86_64
#define address_space_stb address_space_stb_x86_64
#define address_space_stb_cached address_space_stb_cached_x86_64
#define address_space_stl address_space_stl_x86_64
#define address_space_stl_be address_space_stl_be_x86_64
#define address_space_stl_be_cached address_space_stl_be_cached_x86_64
#define address_space_stl_cached address_space_stl_cached_x86_64
#define address_space_stl_le address_space_stl_le_x86_64
#define address_space_stl_le_cached address_space_stl_le_cached_x86_64
#define address_space_stl_notdirty address_space_stl_notdirty_x86_64
#define address_space_stl_notdirty_cached address_space_stl_notdirty_cached_x86_64
#define address_space_stq address_space_stq_x86_64
#define address_space_stq_be address_space_stq_be_x86_64
#define address_space_stq_be_cached address_space_stq_be_cached_x86_64
#define address_space_stq_cached address_space_stq_cached_x86_64
#define address_space_stq_le address_space_stq_le_x86_64
#define address_space_stq_le_cached address_space_stq_le_cached_x86_64
#define address_space_stw address_space_stw_x86_64
#define address_space_stw_be address_space_stw_be_x86_64
#define address_space_stw_be_cached address_space_stw_be_cached_x86_64
#define address_space_stw_cached address_space_stw_cached_x86_64
#define address_space_stw_le address_space_stw_le_x86_64
#define address_space_stw_le_cached address_space_stw_le_cached_x86_64
#define address_space_translate address_space_translate_x86_64
#define address_space_translate_for_iotlb address_space_translate_for_iotlb_x86_64
#define address_space_translate_internal address_space_translate_internal_x86_64
@ -2162,27 +2186,37 @@
#define last_ram_offset last_ram_offset_x86_64
#define ldl_be_p ldl_be_p_x86_64
#define ldl_be_phys ldl_be_phys_x86_64
#define ldl_be_phys_cached ldl_be_phys_cached_x86_64
#define ldl_he_p ldl_he_p_x86_64
#define ldl_le_p ldl_le_p_x86_64
#define ldl_le_phys ldl_le_phys_x86_64
#define ldl_le_phys_cached ldl_le_phys_cached_x86_64
#define ldl_phys ldl_phys_x86_64
#define ldl_phys_cached ldl_phys_cached_x86_64
#define ldl_phys_internal ldl_phys_internal_x86_64
#define ldq_be_p ldq_be_p_x86_64
#define ldq_be_phys ldq_be_phys_x86_64
#define ldq_be_phys_cached ldq_be_phys_cached_x86_64
#define ldq_he_p ldq_he_p_x86_64
#define ldq_le_p ldq_le_p_x86_64
#define ldq_le_phys ldq_le_phys_x86_64
#define ldq_le_phys_cached ldq_le_phys_cached_x86_64
#define ldq_phys ldq_phys_x86_64
#define ldq_phys_cached ldq_phys_cached_x86_64
#define ldq_phys_internal ldq_phys_internal_x86_64
#define ldst_name ldst_name_x86_64
#define ldub_p ldub_p_x86_64
#define ldub_phys ldub_phys_x86_64
#define ldub_phys_cached ldub_phys_cached_x86_64
#define lduw_be_p lduw_be_p_x86_64
#define lduw_be_phys lduw_be_phys_x86_64
#define lduw_be_phys_cached lduw_be_phys_cached_x86_64
#define lduw_he_p lduw_he_p_x86_64
#define lduw_le_p lduw_le_p_x86_64
#define lduw_le_phys lduw_le_phys_x86_64
#define lduw_le_phys_cached lduw_le_phys_cached_x86_64
#define lduw_phys lduw_phys_x86_64
#define lduw_phys_cached lduw_phys_cached_x86_64
#define lduw_phys_internal lduw_phys_internal_x86_64
#define le128 le128_x86_64
#define linked_bp_matches linked_bp_matches_x86_64
@ -2790,24 +2824,32 @@
#define start_list start_list_x86_64
#define stb_p stb_p_x86_64
#define stb_phys stb_phys_x86_64
#define stb_phys_cached stb_phys_cached_x86_64
#define stl_be_p stl_be_p_x86_64
#define stl_be_phys stl_be_phys_x86_64
#define stl_be_phys_cached stl_be_phys_cached_x86_64
#define stl_he_p stl_he_p_x86_64
#define stl_le_p stl_le_p_x86_64
#define stl_le_phys stl_le_phys_x86_64
#define stl_le_phys_cached stl_le_phys_cached_x86_64
#define stl_phys stl_phys_x86_64
#define stl_phys_cached stl_phys_cached_x86_64
#define stl_phys_internal stl_phys_internal_x86_64
#define stl_phys_notdirty stl_phys_notdirty_x86_64
#define stl_phys_notdirty_cached stl_phys_notdirty_cached_x86_64
#define store_cpu_offset store_cpu_offset_x86_64
#define store_reg store_reg_x86_64
#define store_reg_bx store_reg_bx_x86_64
#define store_reg_from_load store_reg_from_load_x86_64
#define stq_be_p stq_be_p_x86_64
#define stq_be_phys stq_be_phys_x86_64
#define stq_be_phys_cached stq_be_phys_cached_x86_64
#define stq_he_p stq_he_p_x86_64
#define stq_le_p stq_le_p_x86_64
#define stq_le_phys stq_le_phys_x86_64
#define stq_le_phys_cached stq_le_phys_cached_x86_64
#define stq_phys stq_phys_x86_64
#define stq_phys_cached stq_phys_cached_x86_64
#define string_input_get_visitor string_input_get_visitor_x86_64
#define string_input_visitor_cleanup string_input_visitor_cleanup_x86_64
#define string_input_visitor_new string_input_visitor_new_x86_64
@ -2816,11 +2858,14 @@
#define strpadcpy strpadcpy_x86_64
#define strstart strstart_x86_64
#define stw_be_p stw_be_p_x86_64
#define stw_be_phys_cached stw_be_phys_cached_x86_64
#define stw_be_phys stw_be_phys_x86_64
#define stw_he_p stw_he_p_x86_64
#define stw_le_p stw_le_p_x86_64
#define stw_le_phys stw_le_phys_x86_64
#define stw_le_phys_cached stw_le_phys_cached_x86_64
#define stw_phys stw_phys_x86_64
#define stw_phys_cached stw_phys_cached_x86_64
#define stw_phys_internal stw_phys_internal_x86_64
#define sub128 sub128_x86_64
#define sub16_sat sub16_sat_x86_64