diff --git a/qemu/aarch64.h b/qemu/aarch64.h
index 1dd5b28a..95783656 100644
--- a/qemu/aarch64.h
+++ b/qemu/aarch64.h
@@ -3330,6 +3330,8 @@
 #define helper_sve_clz_d helper_sve_clz_d_aarch64
 #define helper_sve_clz_h helper_sve_clz_h_aarch64
 #define helper_sve_clz_s helper_sve_clz_s_aarch64
+#define helper_sve_compact_d helper_sve_compact_d_aarch64
+#define helper_sve_compact_s helper_sve_compact_s_aarch64
 #define helper_sve_cnot_b helper_sve_cnot_b_aarch64
 #define helper_sve_cnot_d helper_sve_cnot_d_aarch64
 #define helper_sve_cnot_h helper_sve_cnot_h_aarch64
diff --git a/qemu/aarch64eb.h b/qemu/aarch64eb.h
index 60b95da5..767457c4 100644
--- a/qemu/aarch64eb.h
+++ b/qemu/aarch64eb.h
@@ -3330,6 +3330,8 @@
 #define helper_sve_clz_d helper_sve_clz_d_aarch64eb
 #define helper_sve_clz_h helper_sve_clz_h_aarch64eb
 #define helper_sve_clz_s helper_sve_clz_s_aarch64eb
+#define helper_sve_compact_d helper_sve_compact_d_aarch64eb
+#define helper_sve_compact_s helper_sve_compact_s_aarch64eb
 #define helper_sve_cnot_b helper_sve_cnot_b_aarch64eb
 #define helper_sve_cnot_d helper_sve_cnot_d_aarch64eb
 #define helper_sve_cnot_h helper_sve_cnot_h_aarch64eb
diff --git a/qemu/header_gen.py b/qemu/header_gen.py
index dd2a1f93..e3451202 100644
--- a/qemu/header_gen.py
+++ b/qemu/header_gen.py
@@ -3351,6 +3351,8 @@ aarch64_symbols = (
     'helper_sve_clz_d',
     'helper_sve_clz_h',
     'helper_sve_clz_s',
+    'helper_sve_compact_d',
+    'helper_sve_compact_s',
     'helper_sve_cnot_b',
     'helper_sve_cnot_d',
     'helper_sve_cnot_h',
diff --git a/qemu/target/arm/helper-sve.h b/qemu/target/arm/helper-sve.h
index bab20345..d977aea0 100644
--- a/qemu/target/arm/helper-sve.h
+++ b/qemu/target/arm/helper-sve.h
@@ -460,6 +460,9 @@ DEF_HELPER_FLAGS_4(sve_trn_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_4(sve_trn_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_4(sve_trn_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
 
+DEF_HELPER_FLAGS_4(sve_compact_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sve_compact_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
 DEF_HELPER_FLAGS_5(sve_and_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_5(sve_bic_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_5(sve_eor_pppp, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
diff --git a/qemu/target/arm/sve.decode b/qemu/target/arm/sve.decode
index 7b55b1e7..554f087c 100644
--- a/qemu/target/arm/sve.decode
+++ b/qemu/target/arm/sve.decode
@@ -424,6 +424,12 @@ UZP2_z          00000101 .. 1 ..... 011 011 ..... .....         @rd_rn_rm
 TRN1_z          00000101 .. 1 ..... 011 100 ..... .....         @rd_rn_rm
 TRN2_z          00000101 .. 1 ..... 011 101 ..... .....         @rd_rn_rm
 
+### SVE Permute - Predicated Group
+
+# SVE compress active elements
+# Note esz >= 2
+COMPACT         00000101 .. 100001 100 ... ..... .....          @rd_pg_rn
+
 ### SVE Predicate Logical Operations Group
 
 # SVE predicate logical operations
diff --git a/qemu/target/arm/sve_helper.c b/qemu/target/arm/sve_helper.c
index ccc77a7a..2ee42e88 100644
--- a/qemu/target/arm/sve_helper.c
+++ b/qemu/target/arm/sve_helper.c
@@ -2035,3 +2035,37 @@ DO_TRN(sve_trn_d, uint64_t, )
 #undef DO_ZIP
 #undef DO_UZP
 #undef DO_TRN
+
+void HELPER(sve_compact_s)(void *vd, void *vn, void *vg, uint32_t desc)
+{
+    intptr_t i, j, opr_sz = simd_oprsz(desc) / 4;
+    uint32_t *d = vd, *n = vn;
+    uint8_t *pg = vg;
+
+    for (i = j = 0; i < opr_sz; i++) {
+        if (pg[H1(i / 2)] & (i & 1 ? 0x10 : 0x01)) {
+            d[H4(j)] = n[H4(i)];
+            j++;
+        }
+    }
+    for (; j < opr_sz; j++) {
+        d[H4(j)] = 0;
+    }
+}
+
+void HELPER(sve_compact_d)(void *vd, void *vn, void *vg, uint32_t desc)
+{
+    intptr_t i, j, opr_sz = simd_oprsz(desc) / 8;
+    uint64_t *d = vd, *n = vn;
+    uint8_t *pg = vg;
+
+    for (i = j = 0; i < opr_sz; i++) {
+        if (pg[H1(i)] & 1) {
+            d[j] = n[i];
+            j++;
+        }
+    }
+    for (; j < opr_sz; j++) {
+        d[j] = 0;
+    }
+}
diff --git a/qemu/target/arm/translate-sve.c b/qemu/target/arm/translate-sve.c
index 588d135d..10a6b492 100644
--- a/qemu/target/arm/translate-sve.c
+++ b/qemu/target/arm/translate-sve.c
@@ -2370,6 +2370,18 @@ static bool trans_TRN2_z(DisasContext *s, arg_rrr_esz *a, uint32_t insn)
     return do_zzz_data_ool(s, a, 1 << a->esz, trn_fns[a->esz]);
 }
 
+/*
+ *** SVE Permute Vector - Predicated Group
+ */
+
+static bool trans_COMPACT(DisasContext *s, arg_rpr_esz *a, uint32_t insn)
+{
+    static gen_helper_gvec_3 * const fns[4] = {
+        NULL, NULL, gen_helper_sve_compact_s, gen_helper_sve_compact_d
+    };
+    return do_zpz_ool(s, a, fns[a->esz]);
+}
+
 /*
  *** SVE Memory - 32-bit Gather and Unsized Contiguous Group
  */