From 8ca718367f8a3c55a7398c99a3f2daca2fa5fab0 Mon Sep 17 00:00:00 2001
From: vardyh <vardyh.dev@gmail.com>
Date: Fri, 7 Sep 2018 19:27:49 -0400
Subject: [PATCH] x86::trans: handle illegal case for opc c6/c7

Reference Intel software developer manual vol2 Appendix A Table A-6 for
detailed decoding information.

Re-applies commit ad767abda815f5c79b6658bf75ffc393a6a3c45c from qemu
---
 qemu/target/i386/translate.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/qemu/target/i386/translate.c b/qemu/target/i386/translate.c
index 357ae9c1..60a73bf6 100644
--- a/qemu/target/i386/translate.c
+++ b/qemu/target/i386/translate.c
@@ -6105,12 +6105,21 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xc6:
     case 0xc7: /* mov Ev, Iv */
+        // Unicorn: Altered to handle illegal opcodes
         ot = mo_b_d(b, dflag);
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
+        reg = ((modrm >> 3) & 7) | rex_r;
         if (mod != 3) {
+            if (reg != 0) {
+                goto illegal_op;
+            }
             s->rip_offset = insn_const_size(ot);
             gen_lea_modrm(env, s, modrm);
+        } else {
+            if (reg != 0 && reg != 7) {
+                goto illegal_op;
+            }
         }
         val = insn_get(env, s, ot);
         tcg_gen_movi_tl(tcg_ctx, cpu_T0, val);