target/*helper: don't check retaddr before calling cpu_restore_state

cpu_restore_state officially supports being passed an address it can't
resolve the state for. As a result the checks in the helpers are
superfluous and can be removed. This makes the code consistent with
other users of cpu_restore_state.

Of course this does nothing to address what to do if cpu_restore_state
can't resolve the state but so far it seems this is handled elsewhere.

The change was made with included coccinelle script.

Backports commit 65255e8efdd5fca602bcc4ff61a879939ff75f4f from qemu
This commit is contained in:
Alex Bennée 2018-03-05 14:47:35 -05:00 committed by Lioncash
parent 4db1e153ae
commit 8e973e762d
No known key found for this signature in database
GPG Key ID: 4E3C3CC1031BA9C7
3 changed files with 9 additions and 20 deletions

View File

@ -181,10 +181,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
if (unlikely(ret)) {
ARMCPU *cpu = ARM_CPU(cs->uc, cs);
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr);
}
deliver_fault(cpu, addr, access_type, mmu_idx, &fi);
}
@ -198,10 +196,8 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
ARMCPU *cpu = ARM_CPU(cs->uc, cs);
ARMMMUFaultInfo fi = {0};
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr);
}
fi.type = ARMFault_Alignment;
deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);
@ -220,10 +216,8 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
ARMCPU *cpu = ARM_CPU(cs->uc, cs);
ARMMMUFaultInfo fi = {};
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr);
}
/* The EA bit in syndromes and fault status registers is an
* IMPDEF classification of external aborts. ARM implementations

View File

@ -573,9 +573,7 @@ void cpu_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1,
{
CPUState *cs = CPU(x86_env_get_cpu(env));
if (retaddr) {
cpu_restore_state(cs, retaddr);
}
qemu_log_mask(CPU_LOG_TB_IN_ASM, "vmexit(%08x, %016" PRIx64 ", %016"
PRIx64 ", " TARGET_FMT_lx ")!\n",

View File

@ -47,11 +47,8 @@ void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type,
ret = m68k_cpu_handle_mmu_fault(cs, addr, access_type, mmu_idx);
if (unlikely(ret)) {
if (retaddr) {
/* now we have a real cpu fault */
cpu_restore_state(cs, retaddr);
}
cpu_loop_exit(cs);
cpu_loop_exit_restore(cs, retaddr);
}
}