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target-mips: add microMIPS TLBINV, TLBINVF

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Add microMIPS TLBINV, TLBINVF

Backports commit e60ec06357470db5a0f25901ca19b6237e6da927 from qemu
This commit is contained in:
Yongbok Kim 2018-02-13 20:48:40 -05:00 committed by Lioncash
parent af0e6e9be3
commit 9750bc546f
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 8 additions and 0 deletions
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8
qemu/target-mips/translate.c
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@ -12332,6 +12332,8 @@ enum {
TLBR = 0x1,
TLBWI = 0x2,
TLBWR = 0x3,
TLBINV = 0x4,
TLBINVF = 0x5,
WAIT = 0x9,
IRET = 0xd,
DERET = 0xe,
@ -13117,6 +13119,12 @@ static void gen_pool32axf (CPUMIPSState *env, DisasContext *ctx, int rt, int rs)
case TLBWR:
mips32_op = OPC_TLBWR;
goto do_cp0;
case TLBINV:
mips32_op = OPC_TLBINV;
goto do_cp0;
case TLBINVF:
mips32_op = OPC_TLBINVF;
goto do_cp0;
case WAIT:
mips32_op = OPC_WAIT;
goto do_cp0;