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tcg: update README about size changing ops

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Backports commit 870ad1547ac53bc79c21d86cf453b3b20cc660a2 from qemu
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Aurelien Jarno 2018-02-10 22:49:21 -05:00 committed by Lioncash
parent 4bd3d5005e
commit a05256b206
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1 changed files with 15 additions and 3 deletions
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qemu/tcg/README
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@ -466,13 +466,25 @@ On a 32 bit target, all 64 bit operations are converted to 32 bits. A
few specific operations must be implemented to allow it (see add2_i32,
sub2_i32, brcond2_i32).
On a 64 bit target, the values are transfered between 32 and 64-bit
registers using the following ops:
- trunc_shr_i64_i32
- ext_i32_i64
- extu_i32_i64
They ensure that the values are correctly truncated or extended when
moved from a 32-bit to a 64-bit register or vice-versa. Note that the
trunc_shr_i64_i32 is an optional op. It is not necessary to implement
it if all the following conditions are met:
- 64-bit registers can hold 32-bit values
- 32-bit values in a 64-bit register do not need to stay zero or
sign extended
- all 32-bit TCG ops ignore the high part of 64-bit registers
Floating point operations are not supported in this version. A
previous incarnation of the code generator had full support of them,
but it is better to concentrate on integer operations first.
On a 64 bit target, no assumption is made in TCG about the storage of
the 32 bit values in 64 bit registers.
4.2) Constraints
GCC like constraints are used to define the constraints of every