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target-mips: Use the new extract op

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Use extract for EXT and DEXT.

Backports commit 6eebb7a438236fcf3fdadb013921ac597aaea911 fromq qemu
This commit is contained in:
Richard Henderson 2018-03-01 14:39:16 -05:00 committed by Lioncash
parent e5acbeb86e
commit b62743947f
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 5 additions and 7 deletions
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12
qemu/target-mips/translate.c
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@ -4550,11 +4550,12 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt,
if (lsb + msb > 31) {
goto fail;
}
tcg_gen_shri_tl(tcg_ctx, t0, t1, lsb);
if (msb != 31) {
tcg_gen_andi_tl(tcg_ctx, t0, t0, (1U << (msb + 1)) - 1);
tcg_gen_extract_tl(tcg_ctx, t0, t1, lsb, msb + 1);
} else {
tcg_gen_ext32s_tl(tcg_ctx, t0, t0);
/* The two checks together imply that lsb == 0,
so this is a simple sign-extension. */
tcg_gen_ext32s_tl(tcg_ctx, t0, t1);
}
break;
#if defined(TARGET_MIPS64)
@ -4569,10 +4570,7 @@ static void gen_bitops (DisasContext *ctx, uint32_t opc, int rt,
if (lsb + msb > 63) {
goto fail;
}
tcg_gen_shri_tl(tcg_ctx, t0, t1, lsb);
if (msb != 63) {
tcg_gen_andi_tl(tcg_ctx, t0, t0, (1ULL << (msb + 1)) - 1);
}
tcg_gen_extract_tl(tcg_ctx, t0, t1, lsb, msb + 1);
break;
#endif
case OPC_INS: