yuzu-emu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2024-10-21 12:28:20 +02:00
Code Issues Packages Projects Releases Wiki Activity

target/arm: Remove offset argument to gen_exception_bkpt_insn

Browse Source 
Unlike the other more generic gen_exception{,_internal}_insn
interfaces, breakpoints always refer to the current instruction.

Backports commit 06bcbda3f64d464b6ecac789bce4bd69f199cd68 from qemu
This commit is contained in:
Richard Henderson 2019-11-18 20:04:19 -05:00 committed by Lioncash
parent f19b4df20d
commit d562bea784
No known key found for this signature in database
GPG Key ID: 4E3C3CC1031BA9C7
2 changed files with 7 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
qemu/target/arm/translate-a64.c
View File

@ -409,13 +409,12 @@ static void gen_exception_insn(DisasContext *s, int offset, int excp,
s->base.is_jmp = DISAS_NORETURN; s->base.is_jmp = DISAS_NORETURN;
} }
static void gen_exception_bkpt_insn(DisasContext *s, int offset, static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syndrome)
uint32_t syndrome)
{ {
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_i32 tcg_syn; TCGv_i32 tcg_syn;
gen_a64_set_pc_im(s, s->base.pc_next - offset); gen_a64_set_pc_im(s, s->pc_curr);
tcg_syn = tcg_const_i32(tcg_ctx, syndrome); tcg_syn = tcg_const_i32(tcg_ctx, syndrome);
gen_helper_exception_bkpt_insn(tcg_ctx, tcg_ctx->cpu_env, tcg_syn); gen_helper_exception_bkpt_insn(tcg_ctx, tcg_ctx->cpu_env, tcg_syn);
tcg_temp_free_i32(tcg_ctx, tcg_syn); tcg_temp_free_i32(tcg_ctx, tcg_syn);
@ -2100,7 +2099,7 @@ static void disas_exc(DisasContext *s, uint32_t insn)
break; break;
} }
/* BRK */ /* BRK */
gen_exception_bkpt_insn(s, 4, syn_aa64_bkpt(imm16)); gen_exception_bkpt_insn(s, syn_aa64_bkpt(imm16));
break; break;
case 2: case 2:
if (op2_ll != 0) { if (op2_ll != 0) {

8
qemu/target/arm/translate.c
View File

@ -1332,13 +1332,13 @@ static void gen_exception_insn(DisasContext *s, int offset, int excp,
s->base.is_jmp = DISAS_NORETURN; s->base.is_jmp = DISAS_NORETURN;
} }
static void gen_exception_bkpt_insn(DisasContext *s, int offset, uint32_t syn) static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syn)
{ {
TCGContext *tcg_ctx = s->uc->tcg_ctx; TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_i32 tcg_syn; TCGv_i32 tcg_syn;
gen_set_condexec(s); gen_set_condexec(s);
gen_set_pc_im(s, s->base.pc_next - offset); gen_set_pc_im(s, s->pc_curr);
tcg_syn = tcg_const_i32(tcg_ctx, syn); tcg_syn = tcg_const_i32(tcg_ctx, syn);
gen_helper_exception_bkpt_insn(tcg_ctx, tcg_ctx->cpu_env, tcg_syn); gen_helper_exception_bkpt_insn(tcg_ctx, tcg_ctx->cpu_env, tcg_syn);
tcg_temp_free_i32(tcg_ctx, tcg_syn); tcg_temp_free_i32(tcg_ctx, tcg_syn);
@ -8323,7 +8323,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn)
case 1: case 1:
/* bkpt */ /* bkpt */
ARCH(5); ARCH(5);
gen_exception_bkpt_insn(s, 4, syn_aa32_bkpt(imm16, false)); gen_exception_bkpt_insn(s, syn_aa32_bkpt(imm16, false));
break; break;
case 2: case 2:
/* Hypervisor call (v7) */ /* Hypervisor call (v7) */
@ -11746,7 +11746,7 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
{ {
int imm8 = extract32(insn, 0, 8); int imm8 = extract32(insn, 0, 8);
ARCH(5); ARCH(5);
gen_exception_bkpt_insn(s, 2, syn_aa32_bkpt(imm8, true)); gen_exception_bkpt_insn(s, syn_aa32_bkpt(imm8, true));
break; break;
} }