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target-i386: fix ordering of fields in CPUX86State

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Make sure reset zeroes TSC_AUX, XCR0, PKRU. Move XSTATE_BV from the
"vmstate only" section to the "KVM only" section.

Backports commit 7616f1c2da1c0f336a474a56ad6d32e15ccd666e from qemu
This commit is contained in:
Paolo Bonzini 2018-02-26 02:34:12 -05:00 committed by Lioncash
parent 7acc14da16
commit d8d0d08262
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GPG Key ID: 4E3C3CC1031BA9C7
1 changed files with 6 additions and 5 deletions
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11
qemu/target-i386/cpu.h
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@ -1036,6 +1036,9 @@ typedef struct CPUX86State {
uint64_t tsc;
uint64_t tsc_adjust;
uint64_t tsc_deadline;
uint64_t tsc_aux;
uint64_t xcr0;
uint64_t mcg_status;
uint64_t msr_ia32_misc_enable;
@ -1052,6 +1055,8 @@ typedef struct CPUX86State {
uint64_t pat;
uint32_t smbase;
uint32_t pkru;
/* End of state preserved by INIT (dummy marker). */
//struct {} end_init_save;
int end_init_save;
@ -1129,19 +1134,15 @@ typedef struct CPUX86State {
uint64_t mcg_ext_ctl;
uint64_t mce_banks[MCE_BANKS_DEF*4];
uint64_t tsc_aux;
uint64_t xstate_bv;
/* vmstate */
uint16_t fpus_vmstate;
uint16_t fptag_vmstate;
uint16_t fpregs_format_vmstate;
uint64_t xstate_bv;
uint64_t xcr0;
uint64_t xss;
uint32_t pkru;
TPRAccess tpr_access_type;
// Unicorn engine