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target/arm/translate-a64: Don't underdecode SDOT and UDOT

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In the AdvSIMD scalar x indexed element and vector x indexed element
encoding group, the SDOT and UDOT instructions are vector only,
and their opcode is unallocated in the scalar group. Correctly
UNDEF this unallocated encoding.

Backports commit 4977986ca38fb1d5357532e1a8032b984047a369 from qemu
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Peter Maydell 2019-02-03 17:39:51 -05:00 committed by Lioncash
parent f7d78d9e08
commit eaecbe7901
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1 changed files with 1 additions and 1 deletions
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qemu/target/arm/translate-a64.c
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@ -12812,7 +12812,7 @@ static void disas_simd_indexed(DisasContext *s, uint32_t insn)
break; break;
case 0x0e: /* SDOT */ case 0x0e: /* SDOT */
case 0x1e: /* UDOT */ case 0x1e: /* UDOT */
if (size != MO_32 || !dc_isar_feature(aa64_dp, s)) { if (is_scalar || size != MO_32 || !dc_isar_feature(aa64_dp, s)) {
unallocated_encoding(s); unallocated_encoding(s);
return; return;
} }