From fe0de45a26226056ec3e30694d0b73065ba4762f Mon Sep 17 00:00:00 2001 From: James Hogan Date: Sat, 3 Mar 2018 23:37:35 -0500 Subject: [PATCH] target/mips: Fix MIPS64 MFC0 UserLocal on BE host Using MFC0 to read CP0_UserLocal uses tcg_gen_ld32s_tl, however CP0_UserLocal is a target_ulong. On a big endian host with a MIPS64 target this reads and sign extends the more significant half of the 64-bit register. Fix this by using ld_tl to load the whole target_ulong and ext32s_tl to sign extend it, as done for various other target_ulong COP0 registers. Backports commit e40df9a80bb7cdb0a4ca650985fa9fe572097fa7 from qemu --- qemu/target/mips/translate.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/qemu/target/mips/translate.c b/qemu/target/mips/translate.c index acaeacab..ee471ff3 100644 --- a/qemu/target/mips/translate.c +++ b/qemu/target/mips/translate.c @@ -5219,8 +5219,9 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) goto cp0_unimplemented; case 2: CP0_CHECK(ctx->ulri); - tcg_gen_ld32s_tl(tcg_ctx, arg, tcg_ctx->cpu_env, - offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); + tcg_gen_ld_tl(tcg_ctx, arg, tcg_ctx->cpu_env, + offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); + tcg_gen_ext32s_tl(tcg_ctx, arg, arg); rn = "UserLocal"; break; default: