4 Commits

Author	SHA1	Message	Date
Paolo Bonzini	96e7e32972	softmmu: support up to 12 MMU modes ... At 8k per TLB (for 64-bit host or target), 8 or more modes make the TLBs bigger than 64k, and some RISC TCG backends do not like that. On the affected hosts, cut the TLB size in half---there is still a measurable speedup on PPC with the next patch. Backports commit 1de29aef17a7d70dbc04a7fe51e18942e3ebe313 from qemu	2018-02-13 08:34:52 -05:00
Peter Maydell	9d02c52b8a	cpu_ldst.h: Allow NB_MMU_MODES to be 7 ... Support guest CPUs which need 7 MMU index values. Add a comment about what would be required to raise the limit further (trivial for 8, TCG backend rework for 9 or more). Backports commit 8f3ae2ae2d02727f6d56610c09d7535e43650dd4 from qemu	2018-02-12 11:21:19 -05:00
xorstream	1aeaf5c40d	This code should now build the x86_x64-softmmu part 2.	2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh	344d016104	import	2015-08-21 15:04:50 +08:00