231 Commits

Author	SHA1	Message	Date
Richard Henderson	2caa99929e	target/arm: Implement SVE Floating Point Accumulating Reduction Group ... Backports commit 7f9ddf64d5fe5bfaa91ae0ec52217d86f4d86452 from qemu	2018-07-03 02:21:41 -04:00
Richard Henderson	44d89b4cb1	target/arm: Implement SVE FP Multiply-Add Group ... Backports commit 6ceabaad1101b0b33490b0fd4bed5b6445b0a34e from qemu	2018-07-03 02:17:16 -04:00
Richard Henderson	d1c5d5b728	target/arm: Implement SVE floating-point arithmetic (predicated) ... Backports commit ec3b87c28eb120b6575cc1ed7bfbfbf1b0060163 from qemu	2018-07-03 02:13:04 -04:00
Richard Henderson	e7f53b6d1b	target/arm: Implement SVE integer convert to floating-point ... Backports commit 8092c6a314c9625d8976fb6c5b6969f2a1105cd8 from qemu	2018-07-03 02:05:50 -04:00
Richard Henderson	3a51861c05	target/arm: Implement SVE Memory Contiguous Store Group ... Backports commit 1a039c7e58533d5f9431a2064771113d5961c964 from qemu	2018-07-03 01:57:52 -04:00
Richard Henderson	22a155a5d4	target/arm: Implement SVE Contiguous Load, first-fault and no-fault ... Backports commit e2654d757598d6c06d1ceb25c62ddf7d63cac32f from qemu	2018-07-03 01:52:38 -04:00
Richard Henderson	da1eeb226e	target/arm: Implement SVE Memory Contiguous Load Group ... Backports commit c4e7c493da2fdd2c92a7958e592e38200af2f1ba from qemu	2018-07-03 01:40:18 -04:00
Richard Henderson	d81cc5f5cd	target/arm: Implement SVE Floating Point Arithmetic - Unpredicated Group ... Backports commit 29b80469dc51ae4064e9ef9223967882d2610523 from qemu	2018-06-15 14:10:16 -04:00
Richard Henderson	e56db70fee	target/arm: Implement SVE Integer Wide Immediate - Unpredicated Group ... Backports commit 6e6a157d683058d86a224cf128320d67b0915365 from qemu	2018-06-15 14:05:11 -04:00
Richard Henderson	496bb35c97	target/arm: Implement SVE Integer Compare - Scalars Group ... Backports commit caf1cefc72be98497e0907d0e07f4327fc641e96 from qemu	2018-06-15 13:54:05 -04:00
Richard Henderson	bc55b3e570	target/arm: Implement SVE Predicate Count Group ... Backports commit 9ee3a611de28b8d0862fa687215b04b5aad20747 from qemu	2018-06-15 13:49:58 -04:00
Richard Henderson	bb930f35b0	target/arm: Implement SVE Partition Break Group ... Backports commit 35da316f5e847292ffbe7b6d16cd3988043dfe22 from qemu	2018-06-15 13:42:35 -04:00
Richard Henderson	ade246e87b	target/arm: Implement SVE Integer Compare - Immediate Group ... Backports commit 38cadeba0daf0f16cf2aeaa5b2752b26fb0676c5 from qemu	2018-06-15 13:35:40 -04:00
Richard Henderson	2969a38d61	target/arm: Implement SVE Integer Compare - Vectors Group ... Backports commit 757f9cff1b63895bfd6fc8d66a6e52d7c40baa7b from qemu	2018-06-15 13:29:15 -04:00
Richard Henderson	7211d415a4	target/arm: Implement SVE Select Vectors Group ... Backports commit d3fe4a29d754dee73cbf3cb7584db222981179ac from qemu	2018-06-15 13:17:47 -04:00
Richard Henderson	7698c1634e	target/arm: Implement SVE vector splice (predicated) ... Backports commit b48ff24098c72f86e187e6abb7e9ca4de40a7fb4 from qemu	2018-06-15 13:14:33 -04:00
Richard Henderson	7d930e8515	target/arm: Implement SVE reverse within elements ... Backports commit dae8fb9019d2aa6ccb151a19871df40de6c98e29 from qemu	2018-06-15 13:12:14 -04:00
Richard Henderson	0bb2fdd752	target/arm: Implement SVE conditionally broadcast/extract element ... Backports commit ef23cb726dc32375bc2fca7ac3e9f34816f6ee13 from qemu	2018-06-15 13:01:40 -04:00
Richard Henderson	8ba3bde59b	target/arm: Implement SVE compress active elements ... Backports commit 3ca879aeb3412bc2be35d01a7bedf5fada960b5d from qemu	2018-06-15 12:52:19 -04:00
Richard Henderson	d9ed221567	target/arm: Implement SVE Permute - Interleaving Group ... Backports commit 234b48e9c68759aea78ff5a1e49c2ba806cd1d83 from qemu	2018-06-15 12:49:42 -04:00
Richard Henderson	3722ab310b	target/arm: Implement SVE Permute - Predicates Group ... Backports commit d731d8cb3c74258669211f065c918353eb7b8f4a from qemu	2018-06-15 12:44:50 -04:00
Richard Henderson	c57ff23c56	target/arm: Implement SVE Permute - Unpredicated Group ... Backports commit 30562ab716bcec0bf718b47b5268949856b17604 from qemu	2018-06-15 12:37:56 -04:00
Peter Maydell	7a6ae26346	cputlb: Pass cpu_transaction_failed() the correct physaddr ... The API for cpu_transaction_failed() says that it takes the physical address for the failed transaction. However we were actually passing it the offset within the target MemoryRegion. We don't currently have any target CPU implementations of this hook that require the physical address; fix this bug so we don't get confused if we ever do add one. Backports commit 2d54f19401bc54b3b56d1cc44c96e4087b604b97 from qemu	2018-06-15 12:03:23 -04:00
Richard Henderson	6835b2dd13	target/arm: Implement SVE Permute - Extract Group ... Backports commit b94f8f60bd841c5b737185cd38263e26822f77ab from qemu	2018-05-20 05:26:55 -04:00
Richard Henderson	9917f0d536	target/arm: Implement SVE Integer Wide Immediate - Predicated Group ... Backports commit f25a2361539626721dbccce14c077cad03b2e72c from qemu	2018-05-20 05:24:04 -04:00
Richard Henderson	89038c1e4b	target/arm: Implement SVE Element Count Group ... Backports commit 24e82e68341e73ec0f65534c78c13fd03395b188 from qemu	2018-05-20 05:15:35 -04:00
Richard Henderson	0249ab3f7e	target/arm: Implement SVE floating-point trig select coefficient ... Backports commit a1f233f25fd502f9a5b40c14df1b4dbdda463487 from qemu	2018-05-20 05:05:20 -04:00
Richard Henderson	d6c18fc788	target/arm: Implement SVE floating-point exponential accelerator ... Backports commit 0762cd428fd7b471207f5cb5b4bd4bd8f141dbe0 from qemu	2018-05-20 05:01:16 -04:00
Richard Henderson	cb55a3acdb	target/arm: Implement SVE Compute Vector Address Group ... Backports commit 4b242d9c1b6beaf5c81d84e956243b614a4a1d84 from qemu	2018-05-20 04:57:18 -04:00
Richard Henderson	45e009269e	target/arm: Implement SVE Bitwise Shift - Unpredicated Group ... Backports commit d9d78dccc86eed10ccf1c8e1ac236e41ec330b06 from qemu	2018-05-20 04:51:58 -04:00
Richard Henderson	45a09e2f25	target/arm: Implement SVE Index Generation Group ... Backports commit 9a56c9c3a955b77fe436beef7ac03c76a65fa32d from qemu	2018-05-20 04:43:01 -04:00
Richard Henderson	1730d3cff0	target/arm: Implement SVE Integer Multiply-Add Group ... Backports commit 96a36e4a44bbf296ac212ed68ebf4e48d3dfb1f0 from qemu	2018-05-20 04:35:36 -04:00
Richard Henderson	32949156d2	target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group ... Backports commit afac6d0467c1327ad2e30a3c35347fcf5a773742 from qemu	2018-05-20 04:31:18 -04:00
Lioncash	878b862a04	target/arm: Implement SVE bitwise shift by wide elements (predicated)	2018-05-20 03:10:24 -04:00
Richard Henderson	5aa51a3a74	target/arm: Implement SVE bitwise shift by vector (predicated) ... Backports commit 27721dbb7ae5e2a52f06588cf38854e4cbc613c0 from qemu	2018-05-20 03:07:02 -04:00
Richard Henderson	7bb3067b95	target/arm: Implement SVE bitwise shift by immediate (predicated) ... Backports commit ccd841c3d71db6943f8b6d3d56bd2abb548ba40c from qemu	2018-05-20 03:01:07 -04:00
Richard Henderson	837e39ea63	target/arm: Implement SVE Integer Reduction Group ... Excepting MOVPRFX, which isn't a reduction. Presumably it is placed within the group because of its encoding. Backports commit 047cec971d2791b206677b954227ea92ff7ee3db from qemu	2018-05-20 02:53:04 -04:00
Richard Henderson	331aabddeb	target/arm: Implement SVE Predicate Misc Group ... Backports commit 028e2a7b876631eff165cac59eb43bdb2dcc213b and f97cfd596ed9bd38644323cb61d19b85ac703c81 from qemu	2018-05-20 02:43:36 -04:00
Richard Henderson	65f74e3608	target/arm: Implement SVE Predicate Logical Operations Group ... Backports commit 516e246a1a292f6c6f6aad5451799accbb08acd9 from qemu	2018-05-20 01:35:59 -04:00
Lioncash	1eaa2e4571	target/arm: Implement SVE predicate test	2018-05-20 01:16:16 -04:00
Richard Henderson	49def4bbde	target/arm: Add SVE decode skeleton ... Including only 4, as-yet unimplemented, instruction patterns so that the whole thing compiles. Backports commit 38388f7ee3adc04a7e7246c04352451c4f8d00fb from qemu	2018-05-20 00:48:14 -04:00
Richard Henderson	d2d8e2fc33	target/arm: Introduce translate-a64.h ... Move some stuff that will be common to both translate-a64.c and translate-sve.c. Backports commit 8c71baedb8055beaa681823206ee3a74f9f8649a from qemu	2018-05-20 00:34:25 -04:00
Alex Bennée	40d57900bf	target/arm: convert conversion helpers to fpst/ahp_flag ... Instead of passing env and leaving it up to the helper to get the right fpstatus we pass it explicitly. There was already a get_fpstatus helper for neon for the 32 bit code. We also add an get_ahp_flag() for passing the state of the alternative FP16 format flag. This leaves scope for later tracking the AHP state in translation flags. Backports commit 486624fcd3eaca6165ab8401d73bbae6c0fb81c1 from qemu	2018-05-19 22:58:25 -04:00
Alex Bennée	80074e4745	target/arm: Implement FCMP for fp16 ... These where missed out from the rest of the half-precision work. Backports commit 7a1929256ea1a03df12625e75ed571c60dca5bfb from qemu	2018-05-15 22:24:39 -04:00
Richard Henderson	8436080518	target/arm: Implement FCVT (scalar, integer) for fp16 ... Backports commit 564a0632504fad840491aa9a59453f4e64a316c4 from qemu	2018-05-15 22:06:49 -04:00
Richard Henderson	67740bbc7f	target/arm: Fix float16 to/from int16 ... The instruction "ucvtf v0.4h, v04h, #2", with input 0x8000u, overflows the intermediate float16 to infinity before we have a chance to scale the output. Use float64 as the intermediate type so that no input argument (uint32_t in this case) can overflow or round before scaling. Given the declared argument, the signed int32_t function has the same problem. When converting from float16 to integer, using u/int32_t instead of u/int16_t means that the bounding is incorrect. Backports commit 88808a022c06f98d81cd3f2d105a5734c5614839 from qemu	2018-05-14 08:41:20 -04:00
Richard Henderson	688d0fd0ed	target/arm: Implement CAS and CASP ... Backports commit 44ac14b06fa33f60982923b6b8a3bf8dd2fea61d from qemu	2018-05-14 08:28:45 -04:00
Richard Henderson	de1708aadc	tcg: Introduce atomic helpers for integer min/max ... Given that this atomic operation will be used by both risc-v and aarch64, let's not duplicate code across the two targets. Backports commit 5507c2bf35aa6b4705939349184e71afd5e058b2 from qemu	2018-05-14 08:06:42 -04:00
Richard Henderson	eef66443b2	tcg: Introduce helpers for integer min/max ... These operations are re-invented by several targets so far. Several supported hosts have insns for these, so place the expanders out-of-line for a future introduction of tcg opcodes. Backports commit b87fb8cd9f9a0ba599ff79e7bf03222da02e5724 from qemu	2018-05-14 07:31:50 -04:00
Richard Henderson	2150745db4	tcg: Improve TCGv_ptr support ... Drop TCGV_PTR_TO_NAT and TCGV_NAT_TO_PTR internal macros. Add tcg_temp_local_new_ptr, tcg_gen_brcondi_ptr, tcg_gen_ext_i32_ptr, tcg_gen_trunc_i64_ptr, tcg_gen_extu_ptr_i64, tcg_gen_trunc_ptr_i32. Use inlines instead of macros where possible. Backports commit 5bfa803448638a45542441fd6b7cc1241403ea72 from qemu	2018-05-03 15:05:43 -04:00