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833b0ff964
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5 Commits

Author SHA1 Message Date
Lioncash
833b0ff964
target-mips: Make CP0.Config4 and CP0.Config5 registers signed 
Make the data type used for the CP0.Config4 and CP0.Config5 registers
and their mask signed, for consistency with the remaining 32-bit CP0
registers, like CP0.Config0, etc.

Backports commit 8280b12c0e4b515d707509dde4ddde05d9bda4ef from qemu
 2018-02-11 15:48:10 -05:00
xorstream
69ae8f7987 Fix for MIPS issue. (#733) 2017-01-23 12:39:34 +08:00
xorstream
72a497bc14 Added MIPS support and projects for all samples. 2017-01-23 01:05:08 +11:00
xorstream
770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
Nguyen Anh Quynh
344d016104 import 2015-08-21 15:04:50 +08:00