Nguyen Anh Quynh
8259d76c6c
bindings: add UC_ERR_TIMEOUT
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Backports commit b0d5837c61c4bdd91106c355c8af730929f5a78f from unicorn
2020-01-14 09:47:35 -05:00
naq
2a47d652a6
bindings: update after the last commit on adding ARM modes
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Backports commit 3b17db0d84a2a73deb064e00966edd71338b0321 from unicorn.
2020-01-14 09:39:24 -05:00
naq
93720ae1f0
bindings: update after addition of UC_HOOK_INSN_INVALID
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Backports commit 355eaecc12b8022ccefac432dfa003fdb642c0f5 from unicorn.
2020-01-14 09:18:34 -05:00
kj.xwings.l
038b4f3345
Removed hardcoded CP0C3_ULRI ( #1098 )
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* activate CP0C3_ULRI for CONFIG3, mips
* updated with mips patches
* updated with mips patches
* remove hardcoded config3
* git ignore vscode
* fix spacing issue and turn on floating point
Backports most of commit 24f55a7973278f20f0de21b904851d99d4716263 from
unicorn. Ignores internal core modifications, as this would be
special-casing non-upstreamed behavior.
2019-08-08 20:08:57 -04:00
Nguyen Anh Quynh
7cad644235
bindings: update for latest ARM registers addition
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Backports commit 07cafff76a3093376755e61124124f6f593d64c9 from unicorn
2019-03-08 02:27:24 -05:00
Nguyen Anh Quynh
7bb8554242
bindings: update after recent addition of ARM_REG_IPSR
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Backports 6d47b38b7f8b6de0ee96a93a91180fafe2f01525 from unicorn
2019-02-28 16:44:43 -05:00
Nguyen Anh Quynh
8c8852b914
bindings: add newly added register MXCSR
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Backports commit 738d10298952d195799ce16721feffe5cb8f07bb from unicorn.
2019-02-28 16:34:51 -05:00
Nguyen Anh Quynh
41cc047b87
bindings: update after #922
2017-12-20 22:13:29 +08:00
Sascha Schirra
bc34c36eae
version changed and unicorn.gemspec renamed to unicorn-engine.gemspec ( #915 )
2017-10-27 20:30:01 +08:00
Sascha Schirra
13007eb12a
renamed unicorn gem to unicorn-engine ( #895 )
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* renamed gem unicorn to unicorn-engine
* renamed modules to unicornengine
* renamed Module Unicorn to UnicornEngine and the gem unicorn-engine to unicornengine
* unicornengine -> unicorn_engine
2017-09-19 07:43:21 +07:00
misson20000
3fdb2d2442
add architecture query ( #842 )
2017-05-21 09:47:02 +08:00
misson20000
014ccfb94a
Aarch64 add thread registers ( #834 )
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* add thread registers to AArch64
* update bindings to add AArch64 thread registers
* fix indentation for register read/write switch-case in unicorn_aarch64.c
2017-05-14 14:42:49 +07:00
Ryan Hileman
187b470245
add arm64 CPACR_EL1 register support ( #814 )
2017-05-02 14:51:19 +08:00
Nguyen Anh Quynh
09d14704a5
bindings: update after UC_VERSION_EXTRA change
2017-04-25 12:41:00 +08:00
Nguyen Anh Quynh
5dbc640b9a
bump UC_VERSION_EXTRA to 1
2017-04-20 14:14:24 +08:00
Nguyen Anh Quynh
f4325f8c4e
bindings: update to support X86 MSR id
2017-02-24 21:51:01 +08:00
Nguyen Anh Quynh
b616115df1
update ChangeLog
2017-01-25 12:00:18 +08:00
Nguyen Anh Quynh
3543452b06
ruby: update unicorn_const.rb
2016-11-19 16:48:30 +08:00
Sascha Schirra
2f15e2119d
add new constants
2016-10-22 17:02:46 +02:00
Sascha Schirra
a6b570d033
Version changed
2016-03-22 13:30:52 +01:00
Sascha Schirra
5e72ce39f0
ruby binding added
2016-03-22 12:17:23 +01:00
