Commit Graph

394 Commits

Author SHA1 Message Date
Nguyen Anh Quynh
80a286cf8a python: handle UC_ERR_TIMEOUT, so sample_x86.py behaves like sample_x86.c
Backports commit 810bd34eef41078ca840be2e2ad82d762cb26fa5 from unicorn
2020-01-14 09:53:10 -05:00
Nguyen Anh Quynh
8259d76c6c bindings: add UC_ERR_TIMEOUT
Backports commit b0d5837c61c4bdd91106c355c8af730929f5a78f from unicorn
2020-01-14 09:47:35 -05:00
naq
2a47d652a6 bindings: update after the last commit on adding ARM modes
Backports commit 3b17db0d84a2a73deb064e00966edd71338b0321 from unicorn.
2020-01-14 09:39:24 -05:00
naq
93720ae1f0 bindings: update after addition of UC_HOOK_INSN_INVALID
Backports commit 355eaecc12b8022ccefac432dfa003fdb642c0f5 from unicorn.
2020-01-14 09:18:34 -05:00
Azertinv
a22641c4be Added an invalid instruction hook (#1132)
* first draft for an invalid instruction hook

* Fixed documentation on return value of invalid insn hook

Backports commit 07f94ad1fc62293cac330df9714d739be6354926 from unicorn
2020-01-14 09:15:54 -05:00
AeonLucid
2d8117a0f1 Fixes #1143 (#1144)
Backports commit c46e745338f880a7991adcd53b683722a5d52ad2 from unicorn.
2020-01-14 09:08:41 -05:00
BAYET
bcef414231 Handle serialization of cpu context save (#1129)
* Handle the cpu context save in a more pythonic way, so the context can be serialized and reuse in an other process using the same emulator architecture and modes

* Fix type error ; mistakes a size_t uint64_t ; breaks in 32bit...

Backports commit 8987ad0fffadd16669aa3b402e7e8aaab70ad700 from qemu
2020-01-14 09:02:53 -05:00
kj.xwings.l
038b4f3345
Removed hardcoded CP0C3_ULRI (#1098)
* activate CP0C3_ULRI for CONFIG3, mips

* updated with mips patches

* updated with mips patches

* remove hardcoded config3

* git ignore vscode

* fix spacing issue and turn on floating point

Backports most of commit 24f55a7973278f20f0de21b904851d99d4716263 from
unicorn. Ignores internal core modifications, as this would be
special-casing non-upstreamed behavior.
2019-08-08 20:08:57 -04:00
Lukas Dresel
4b94a8cc44
support for YMM registers ymm8-ymm15 (#1079)
Backports 55d8d073bd80935e807289ae2ff6161145a2afb6 from qemu
2019-04-16 06:35:41 -04:00
Jonas
d27ad4df1b
Added x86Msr functions for the go bindings (#986)
Backports commit d6d413187324e8d9dc852f62016863a44b240a7e from unicorn.
2019-03-08 02:28:37 -05:00
Nguyen Anh Quynh
7cad644235
bindings: update for latest ARM registers addition
Backports commit 07cafff76a3093376755e61124124f6f593d64c9 from unicorn
2019-03-08 02:27:24 -05:00
Disconnect3d
68e17c03dc
Fix naming in Python sample_x86.py (#961)
Backports commit 19ffa83d4353af8834c4c55590ca2ecd357a6bbe from unicorn.
2019-02-28 17:01:10 -05:00
Duncan Ogilvie
8bbe074251
Update dotnet bindings (#973)
Backports commit 0b3cd70e67ef8cd564e86f502a411d4e98b9f752 from unicorn.
2019-02-28 17:00:25 -05:00
Jeremy Sears
c3c6e250e4
Fix Java Makefile on Darwin (#936)
* Fixes the logic for Dylib extensions on macOS.
* Adds an uninstall task and documentation.

Backports commit 94b116877670ed9bbe38b71e3b9ad28f10cb3775 from unicorn
2019-02-28 16:58:03 -05:00
Brian McKenna
07f315af47
Haskell bindings: use ExceptT instead of deprecated EitherT (#1034)
Backports commit 873fffc505b29c6179a8aece18b7e331e5f879e8 from unicorn.
2019-02-28 16:54:02 -05:00
Diego Argueta
50a570e126
Add Lua binding to README (#1050)
Closes https://github.com/dargueta/unicorn-lua/issues/1

Backports commit f2438188069e31d637666e72dcddd13cef0e684e from qemu
2019-02-28 16:48:20 -05:00
kj.xwings.l
15d52aefbe
update python binding samples, shellcode.py with 64bit syscall (#1052)
* update python binding samples, shellcode.py with 64bit syscall

* fix with quynh comments

* fix with more q comments

* reformatted

* reformatted and moved file

* reformatted and moved file

* delete file

* delete dead code

* deleted more dead code

* deleted more dead code / fix bugs

* fix 64bit eip intno eax

* rearrage rip

* Inconsistent print

Backports commit 8c6cbe3f3cabed57b23b721c29f937dd5baafc90 from unicorn.
2019-02-28 16:47:23 -05:00
Nguyen Anh Quynh
7bb8554242
bindings: update after recent addition of ARM_REG_IPSR
Backports 6d47b38b7f8b6de0ee96a93a91180fafe2f01525 from unicorn
2019-02-28 16:44:43 -05:00
Coldzer0
c1267811e2
Pascal/Delphi binding
* Pascal/Delphi binding

Pascal/Delphi language binding

* update credits

Backports commit 84220d83601ba929c56b9e1fadd1686e02cbb93c from unicorn.
2019-02-28 16:36:56 -05:00
Nguyen Anh Quynh
8c8852b914
bindings: add newly added register MXCSR
Backports commit 738d10298952d195799ce16721feffe5cb8f07bb from unicorn.
2019-02-28 16:34:51 -05:00
Vladimir Panteleev
9e40a6441f
bindings/README: Add D bindings
Backports commit 2ab9e837030ae7477753197fa2d6ddbcc6dda942 from unicorn
2018-10-06 04:51:47 -04:00
Nguyen Anh Quynh
505f926992 link to Crystal binding 2017-12-23 00:26:40 +08:00
Nguyen Anh Quynh
41cc047b87 bindings: update after #922 2017-12-20 22:13:29 +08:00
Stephen
5a117c84ff add travis testing path (#930)
closes #927
2017-12-17 19:24:09 +08:00
Sascha Schirra
bc34c36eae version changed and unicorn.gemspec renamed to unicorn-engine.gemspec (#915) 2017-10-27 20:30:01 +08:00
Sascha Schirra
8df86c86a4 changed gem name to unicorn-engine (#911)
* changed gem name to unicorn-engine

* changed the gem name in Makefile
2017-10-17 00:53:20 +08:00
Andrew Dutcher
12642c2555 Cleanups/fixes for the library issue conglomerate (#897)
* Python: Disable distribution of static library on linux and macos; add environment variable LIBUNICORN_PATH to let user specify location of native library; prevent build of native library if this option is enabled; closes #869

* Python: Update README.TXT to describe how to manage the building and usage of the native library
2017-09-24 22:33:01 +08:00
Sascha Schirra
13007eb12a renamed unicorn gem to unicorn-engine (#895)
* renamed gem unicorn to unicorn-engine

* renamed modules to unicornengine

* renamed Module Unicorn to UnicornEngine and the gem unicorn-engine to unicornengine

* unicornengine -> unicorn_engine
2017-09-19 07:43:21 +07:00
fallenoak
46ae3a042e Ruby: Support reading and writing x86 FPU stack registers (#892)
In order to reduce rounding problems from calculations, FPU stack
registers for x86 architectures contain values stored in an
80-bit extended precision format.

As a result, reading and writing to these registers requires
specific handling.

This update brings the Ruby bindings in line with the Python
bindings by supporting reading and writing the FPU stack registers
using 2-element arrays: [mantissa, exponent]

The mantissa array element contains the first 64 bits of the FPU
stack register.

The exponent array element contains the last 16 bits of the FPU
stack register.
2017-09-17 22:44:30 +07:00
Benno Fünfstück
b0b5f8442d python: Fix exception in finalizer at exit (#873)
Sometimes, the finalizer for an `UcRef` runs so late that the members of the
module have already been set to `None`. We need to make sure that we don't
depend on anything in the module, or we risk getting a Exception when we try
to access the `release_handle` method of `None` (`Uc`).
2017-09-15 22:21:25 +07:00
Jonas
a893bcf138 Changed constatns in ruby gdt example (#876)
I think those two numbers are wrong, see http://wiki.osdev.org/Global_Descriptor_Table
2017-08-29 17:03:52 +07:00
Andrew Dutcher
744c34261f Don't error during sdist if config-host.mak doesn't exist (#846) 2017-05-31 11:36:33 +08:00
Sascha Schirra
6d8031eca4 typo fixed: contest_restore -> context_restore (#843) 2017-05-23 00:52:34 +08:00
misson20000
9cb64915c7 fix Ruby bindings (#830)
* fix mem_unmap and query for Ruby bindings

* ruby bindings: fix issues with GC freeing callbacks while we still have references to them

* ruby bindings: add test for garbage collection of hooks

* ruby bindings: let the VM garbage collect hooks properly this time

* ruby bindings: update garbage collection test to make sure Proc is garbage collected after Uc is collected

* ruby bindings: fix m_uc_hook_add to return the ruby VALUE with proper memory management instead of making another one with bad memory management

* ruby bindings: fix cb_hook_intr signature

* add architecture query

* ruby bindings: only treat certain x86 registers specially if we're actually on x86

* only treat certain x86 registers specially if we're actually on x86 (uc_reg_read and uc_reg_write)

* ruby bindings: read and write ARM64's 128-bit NEON registers
2017-05-22 20:46:30 +08:00
misson20000
3fdb2d2442 add architecture query (#842) 2017-05-21 09:47:02 +08:00
Fangrui Song
85e0a54e35 Fix Python 3 samples (#836) 2017-05-15 09:11:22 +08:00
misson20000
014ccfb94a Aarch64 add thread registers (#834)
* add thread registers to AArch64

* update bindings to add AArch64 thread registers

* fix indentation for register read/write switch-case in unicorn_aarch64.c
2017-05-14 14:42:49 +07:00
Ryan Hileman
4b50ca5cec Go: improve hook callback speed by 30% and add a HOOK_CODE benchmark (#835)
* add x86 hook benchmark

* Go: improve hook callback speed by 30%
2017-05-14 00:12:57 +07:00
Ryan Hileman
d39c20acfe Go: fix NewRegBatch([]int{}) (#831) 2017-05-12 09:39:04 +07:00
Ryan Hileman
37edadedec go: add faster RegBatch type (#822) 2017-05-06 22:32:35 +08:00
Samuel Groß
5385baba39 Implemented read and write access to the YMM registers (#819) 2017-05-05 09:02:58 +08:00
zhangwm
4a62409949 arm64eb: arm64 big endian also using little endian instructions. (#816)
* arm64eb: arm64 big endian also using little endian instructions.

* arm64: using another example that depends on endians.

example:
1. store a word: 0x12345678
2. load a byte:
   * little endian : 0x78
   * big endian    : 0x12
2017-05-04 20:00:48 +08:00
Ryan Hileman
187b470245 add arm64 CPACR_EL1 register support (#814) 2017-05-02 14:51:19 +08:00
David Zimmer
9eebd6daa3 vb bindings remove DYNLOAD (#812) 2017-04-27 20:43:47 +08:00
xorstream
fa45a42c76 Removed MSVC binding. (#808) 2017-04-27 10:21:04 +08:00
Nguyen Anh Quynh
0109cd6c8a Merge branch 'master' into a64 2017-04-25 13:00:15 +08:00
Nguyen Anh Quynh
2bd40b9c91 update armeb & arm64eb samples 2017-04-25 12:55:26 +08:00
Nguyen Anh Quynh
09d14704a5 bindings: update after UC_VERSION_EXTRA change 2017-04-25 12:41:00 +08:00
zhangwm
2e973a13f0 arm64eb: add support for ARM64 big endian. 2017-04-24 23:30:01 +08:00
Nguyen Anh Quynh
e917c9de10 Merge branch 'master' into msvc2 2017-04-21 01:17:00 +08:00