Commit Graph

30 Commits

Author SHA1 Message Date
Paolo Bonzini
d4b9f523d6
target-i386: add Ivy Bridge CPU model
Backports commit 2f9ac42acf4602453d5839221df6cc7cabc3355e from qemu
2018-02-17 15:23:21 -05:00
Paolo Bonzini
a866ad9e15
target-i386: add f16c and rdrand to Haswell and Broadwell
Both were added in Ivy Bridge (for which we do not have a CPU model
yet!).

Backports commit 78a611f1936b3eac8ed78a2be2146a742a85212c from qemu
2018-02-17 15:23:21 -05:00
Paolo Bonzini
0a7a60b895
target-i386: add VME to all CPUs
vm86 mode extensions date back to the 486. All models should have
them.

Backports commit b3a4f0b1a072a467d003755ca0e55c5be38387cb from qemu
2018-02-17 15:23:20 -05:00
Paolo Bonzini
5e9ea14b7e
target-i386: add feature flags for CPUID[EAX=0xd,ECX=1]
These represent xsave-related capabilities of the processor, and KVM may
or may not support them.

Add feature bits so that they are considered by "-cpu ...,enforce", and use
the new feature work instead of calling kvm_arch_get_supported_cpuid.

Bit 3 (XSAVES) is not migratables because it requires saving MSR_IA32_XSS.
Neither KVM nor any commonly available hardware supports it anyway.

Backports commit 0bb0b2d2fe7f645ddaf1f0ff40ac669c9feb4aa1 from qemu

also backports 18cd2c17b5370369a886155c001da0a7f54bbcca
2018-02-17 15:23:19 -05:00
Peter Crosthwaite
9e23308b66
cpu: Change cpu_exec_init() arg to cpu, not env
The callers (most of them in target-foo/cpu.c) to this function all
have the cpu pointer handy. Just pass it to avoid an ENV_GET_CPU() from
core code (in exec.c).

Backports commit 4bad9e392e788a218967167a38ce2ae7a32a6231 from qemu
2018-02-17 15:23:18 -05:00
Markus Armbruster
76c16a46c7
qerror: Clean up QERR_ macros to expand into a single string
These macros expand into error class enumeration constant, comma,
string. Unclean. Has been that way since commit 13f59ae.

The error class is always ERROR_CLASS_GENERIC_ERROR since the previous
commit.

* Prepend every use of a QERR_ macro by ERROR_CLASS_GENERIC_ERROR, and
delete it from the QERR_ macro. No change after preprocessing.

* Rewrite error_set(ERROR_CLASS_GENERIC_ERROR, ...) into
error_setg(...). Again, no change after preprocessing.

Backports commit c6bd8c706a799eb0fece99f468aaa22b818036f3 from qemu
2018-02-17 15:23:09 -05:00
Paolo Bonzini
91503663e2
target-i386: create a separate AddressSpace for each CPU
Different CPUs can be in SMM or not at the same time, thus they
will see different things where the chipset places SMRAM.

Backports commit 2001d0cd6d55e5efa9956fa8ff8b89034d6a4329 from qemu
2018-02-13 12:36:26 -05:00
Paolo Bonzini
fa57438734
target-i386: wake up processors that receive an SMI
An SMI should definitely wake up a processor in halted state!
This lets OVMF boot with SMM on multiprocessor systems, although
it halts very soon after that with a "CpuIndex != BspIndex"
assertion failure.

Backports commit a9bad65d2c1f61af74ce2ff43238d4b20bf81c3a from qemu
2018-02-13 12:32:24 -05:00
Eduardo Habkost
141754beea
target-i386: Remove AMD feature flag aliases from CPU model table
When CPU vendor is AMD, the AMD feature alias bits on
CPUID[0x80000001].EDX are already automatically copied from CPUID[1].EDX
on x86_cpu_realizefn(). When CPU vendor is Intel, those bits are
reserved and should be zero. On either case, those bits shouldn't be set
in the CPU model table.

Backports commit 726a8ff68677d8d5fba17eb0ffb85076bfb598dc from qemu
2018-02-12 20:55:52 -05:00
Eduardo Habkost
43ab099a13
target-i386: X86CPU::xlevel2 QOM property
We already have "level" and "xlevel", only "xlevel2" is missing.

Backports commit 01431f3ce0f31e123172cc99c12c98c0ddbe9917 from qemu
2018-02-12 20:53:22 -05:00
Eduardo Habkost
f75d72bc3d
target-i386: Make level and xlevel properties static
Static properties require only 1 line of code, much simpler than the
existing code that requires writing new getters/setters.

As a nice side-effect, this fixes an existing bug where the setters were
incorrectly allowing the properties to be changed after the CPU was
already realized.

Backports commit b9472b76d273c7796d877c49af50969c0a879c50 from qemu
2018-02-12 20:50:25 -05:00
Nadav Amit
8debf8cc3c
target-i386: clear bsp bit when designating bsp
Since the BSP bit is writable on real hardware, during reset all the CPUs which
were not chosen to be the BSP should have their BSP bit cleared. This fix is
required for KVM to work correctly when it changes the BSP bit.

An additional fix is required for QEMU tcg to allow software to change the BSP
bit.

Backports commit 9cb11fd7539b5b787d8fb3834004804a58dd16ae from qemu
2018-02-12 16:40:35 -05:00
Eduardo Habkost
fc39930347
target-i386: Move APIC ID compatibility code to pc.c
The APIC ID compatibility code is required only for PC, and now that
x86_cpu_initfn() doesn't use x86_cpu_apic_id_from_index() anymore, that
code can be moved to pc.c.

Backports commit de13197a38cf45c990802661a057f64a05426cbc from qemu
2018-02-12 15:59:20 -05:00
Eduardo Habkost
a55484021b
target-i386: Require APIC ID to be explicitly set before CPU realize
Instead of setting APIC ID automatically when creating a X86CPU, require
the property to be set before realizing the object (which all callers of
cpu_x86_create() already do).

Backports commit e1356dd70aef11425883dd4d2885f1d208eb9d57 from qemu
2018-02-12 15:52:53 -05:00
Eduardo Habkost
ce36141f10
target-i386: Set APIC ID using cpu_index on CONFIG_USER
The PC CPU initialization code already sets apic-id based on the CPU
topology, and CONFIG_USER doesn't need the topology-based APIC ID
calculation code.

Make CONFIG_USER set apic-id before realizing the CPU (just like PC
already does), so we can simplify x86_cpu_initfn later. As there is no
CPU topology configuration in CONFIG_USER, just use cpu_index as the
APIC ID.

Backports commit 9c235e83f1c3437be6ca45755909efb745c10deb from qemu
2018-02-12 15:46:26 -05:00
Eduardo Habkost
81cae9834a
target-i386: Move CPUX86State.cpuid_apic_id to X86CPU.apic_id
The field doesn't need to be inside CPUState, and it is not specific for
the CPUID instruction, so move and rename it.

Backports commit 9e9d3863adcbd1ffeca30f240f49805b00ba0d87 from qemu
2018-02-12 15:44:11 -05:00
Lioncash
92c076c042
target-i386: Simplify error handling on cpu_x86_init_user()
Isolate error handling path from the "if (error)" checks.

Backports commit 18b0e4e77142ace948497a053bd5b56c1b849592 from qemu
2018-02-12 15:37:46 -05:00
Eduardo Habkost
51b49a5b97
target-i386: Eliminate cpu_init() function
Instead of putting extra logic inside cpu.h, just do everything inside
cpu_x86_init_user().

Backports commit 15258d46baef5f8265ad5f1002905664cf58f051 from qem
2018-02-12 15:35:44 -05:00
Eduardo Habkost
68fa057b7c
target-i386: Rename cpu_x86_init() to cpu_x86_init_user()
The function is used only for CONFIG_USER, so make its purpose clear.

Backports commit 644dba250a3ed04079792f0d6cc918fb1483e6a5 from qemu
2018-02-12 15:31:29 -05:00
Eduardo Habkost
bba9634578
target-i386: Eliminate unnecessary get_cpuid_vendor() function
The function was used in only two places. In one of them, the function
made the code less readable by requiring temporary te[bcd]x variables.
In the other one we can simply inline the existing code.

Backports commit 08e1a1e5a175ecbfdb761db5a62090498f736969 from qemu
2018-02-12 15:31:26 -05:00
Nguyen Anh Quynh
206819bd98 cleanup after msvc port 2017-01-22 21:27:17 +08:00
xorstream
770c5616e2 Automated leading tab to spaces conversion. 2017-01-21 12:28:22 +11:00
xorstream
df41c49e2d Fixed warning about {} initialisers. 2017-01-21 11:41:11 +11:00
xorstream
fac6a66860 platform.h move #3 2017-01-21 00:13:21 +11:00
xorstream
1aeaf5c40d This code should now build the x86_x64-softmmu part 2. 2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh
7512ff57de more cleanup 2017-01-10 16:29:47 +08:00
Chris Eagle
fccbcfd4c2 revert to use of g_free to make future qemu integrations easier (#695)
* revert to use of g_free to make future qemu integrations easier

* bracing
2016-12-21 22:28:36 +08:00
Chris Eagle
e46545f722 remove glib dependency by provide compatible replacements 2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh
2f297bdd3a handle some errors properly so avoid exit() during initialization. this fixes issue #237 2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh
344d016104 import 2015-08-21 15:04:50 +08:00