Commit Graph

30 Commits

Author SHA1 Message Date
danghvu
27e0699ef5 mips: Fix memleak 2016-07-09 20:16:00 -05:00
Ryan Hileman
acd88856e1 add batched reg access 2016-04-04 20:51:38 -07:00
Hiroyuki UEKAWA
c5888e5670 move macros in qemu/target-*/unicorn*.c to uc_priv.h 2016-03-02 12:43:02 +09:00
Hiroyuki UEKAWA
1cd3c3093b fix WRITE_BYTE_H 2016-03-02 10:51:50 +09:00
Nguyen Anh Quynh
5a04bcb115 allow to change PC during callback. this solves issue #210 2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh
2341f5dd1a code style 2016-01-26 17:37:48 +08:00
Ryan Hileman
0886ae8ede rework code/block tracing 2016-01-22 18:42:27 -08:00
Ryan Hileman
93052f6566 refactor to allow multiple hooks for one type 2016-01-22 18:41:43 -08:00
Nguyen Anh Quynh
4117a111eb mips: handle hook callback for blikely instruction properly. this fixes issue #330, #331 2015-12-23 01:40:03 +08:00
Nguyen Anh Quynh
4f268febb4 mips: check for exit request after every hooked instruction. this fix issue #329 2015-12-20 12:23:36 +08:00
Nguyen Anh Quynh
8d3265d9e1 mips: remove unused variable is_bc_slot 2015-12-16 23:06:17 +08:00
xorstream
395251d3e8 Fix codehook for MIPS instructions in delay slot 2015-12-15 17:02:56 +11:00
Nguyen Anh Quynh
bc63102e50 mips: only patch instruction size when there is a callback on the instruction. this fixes issue #282 2015-12-13 13:11:40 +08:00
Nguyen Anh Quynh
2f297bdd3a handle some errors properly so avoid exit() during initialization. this fixes issue #237 2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh
3a36e327ab support memory redirection, so the issue #217 is fixed 2015-10-27 14:37:03 +08:00
Nguyen Anh Quynh
2b0b4169bc mips: advance PC for SYSCALL instruction. this fixes issue #157 2015-09-28 10:58:43 +08:00
Nguyen Anh Quynh
53ce8f217d mips: handle delay slot better for branch instructions. this should fix issue #155 2015-09-27 15:05:40 +08:00
Nguyen Anh Quynh
886946dcf4 do not use syscall to quit emulation. this can fix issues #147 & #148 2015-09-26 16:49:00 +08:00
Nguyen Anh Quynh
14a01b5186 mips: handle delay slot so do not duplicate calling instruction handler. this fixes issue #133 2015-09-22 11:59:53 +08:00
Nguyen Anh Quynh
a853eb6363 mips, m68k: early check to see if the address of BB is the until address 2015-09-22 10:24:26 +08:00
Nguyen Anh Quynh
18b6680e96 mips: disable debug output 2015-09-08 23:56:25 +08:00
Nguyen Anh Quynh
84e3b5c897 cast all the values to write to registers in uc_reg_write() to unsigned type. this fixes issue #98 2015-09-04 11:17:08 +08:00
Jonathon Reinhart
3bd705a060 Merge remote-tracking branch 'upstream/master' into change-handle-based-api 2015-08-30 00:23:51 -04:00
Nguyen Anh Quynh
b335cf016c do not generate basic-block callback when translation is broken in the middle due to full cache (all the remaining archs) 2015-08-27 21:09:00 +08:00
Jonathon Reinhart
15a774ac90 change uch to uc_struct (target-mips) 2015-08-26 09:02:16 -04:00
Nguyen Anh Quynh
cc5d28e112 mips: fix issue #39 2015-08-26 09:39:09 +08:00
Jonathon Reinhart
9163bba812 restore mode of .[ch] files
These were marked as executable in 5c3b6819, likely due to a Windows
filesystem being involved. This can be avoided:
http://stackoverflow.com/q/1580596/119527
2015-08-24 21:19:12 -04:00
Chris Eagle
5c3b681945 Add const to uc_reg_write and derivitives 2015-08-24 09:42:50 -07:00
mothran
a167f7c456 renames the register constants so unicorn and capstone can compile together 2015-08-23 21:36:33 -07:00
Nguyen Anh Quynh
344d016104 import 2015-08-21 15:04:50 +08:00