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6,171 Commits 7 Branches 6 Tags 35 MiB
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2 Commits

Author SHA1 Message Date
Richard Henderson
d1ad8bf44c
target/riscv: Add checks for several RVC reserved operands 
C.ADDI16SP, C.LWSP, C.JR, C.ADDIW, C.LDSP all have reserved
operands that were not diagnosed.

Backports commit 4cc16b3b9282e04fab8e84d136540757e82af019 from qemu
 2019-05-28 19:20:36 -04:00
Richard Henderson
a62b4e5def
target/riscv: Split RVC32 and RVC64 insns into separate files 
This eliminates all functions in insn_trans/trans_rvc.inc.c,
so the entire file can be removed.

Backports commit 0e68e240a9bd3b44a91cd6012f0e2bf2a43b9fe2 from qemu
 2019-05-28 19:00:23 -04:00