Lioncash
f8388a6c03
header_gen: Fix mips platform
2018-02-10 23:21:41 -05:00
Richard Henderson
a3aaf5a864
tcg: Remove tcg_gen_trunc_i64_i32
...
Replacing it with tcg_gen_extrl_i64_i32.
Backports commit ecc7b3aa71f5fdcf9ee87e74ca811d988282641d from qemu
2018-02-10 23:11:02 -05:00
Richard Henderson
dafc44c0a5
target-mips: Use CPU_LOG_INT for logging related to interrupts
...
There are now no unconditional uses of qemu_log in the subdirectory.
Backports commit c85570163bdf1ba29cb52a63f22ff1c48f1b9398 from qemu
2018-02-10 21:12:41 -05:00
Richard Henderson
6f66fb4bd5
target-mips: Copy restrictions from ext/ins to dext/dins
...
The checks in dins is required to avoid triggering an assertion
in tcg_gen_deposit_tl. The check in dext is just for completeness.
Fold the other D cases in via fallthru.
Backports commit b7f26e523914b982a1c1bfa8295f77ff9787c33c from qemu
2018-02-10 21:09:26 -05:00
Richard Henderson
232632e76c
tcg: Change translator-side labels to a pointer
...
This is improved type checking for the translators -- it's no longer
possible to accidentally swap arguments to the branch functions.
Note that the code generating backends still manipulate labels as int.
With notable exceptions, the scope of the change is just a few lines
for each target, so it's not worth building extra machinery to do this
change in per-target increments.
Backports commit 42a268c241183877192c376d03bd9b6d527407c7 from qemu
2018-02-09 14:17:56 -05:00
Lioncash
0273e6ae18
tcg: Put opcodes in a linked list
...
The previous setup required ops and args to be completely sequential,
and was error prone when it came to both iteration and optimization.
2018-02-09 12:54:05 -05:00
Richard Henderson
a41b9acc0c
tcg: Introduce tcg_op_buf_count and tcg_op_buf_full
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The method by which we count the number of ops emitted
is going to change. Abstract that away into some inlines.
Backports commit fe700adb3db5b028b504423b946d4ee5200a8f2f from qemu.
2018-02-09 09:31:17 -05:00
Richard Henderson
78378289e3
tcg: Move emit of INDEX_op_end into gen_tb_end
...
Backports commit 0a7df5da986bd7ee0789f2d7b8611f2e8eee5046 from qemu
2018-02-09 08:51:01 -05:00
Richard Henderson
6b4b493dae
tcg: Change tcg_global_mem_new_* to take a TCGv_ptr
...
Thus, use cpu_env as the parameter, not TCG_AREG0 directly.
Update all uses in the translators.
Backports commit e1ccc05444676b92c63708096e36582be27fbee1 from qemu
2018-02-08 12:33:33 -05:00
Ryan Hileman
1b00d3f89a
remove slow cpu QOM casts ( #815 )
2017-05-02 14:56:39 +08:00
Nguyen Anh Quynh
e917c9de10
Merge branch 'master' into msvc2
2017-04-21 01:17:00 +08:00
Nguyen Anh Quynh
cb44f77ac3
mips: fix uc_reg_read() for MIPS64
2017-04-12 22:06:26 +08:00
Nguyen Anh Quynh
094ca80092
fix conflicts
2017-03-30 12:23:24 +08:00
zhangwm
ccdb0ff523
armeb: rename arm's and mips's *REGS_STORAGE_SIZE to avoid big-endian and little-endian's duplicated definition.
2017-03-15 22:25:35 +08:00
Nguyen Anh Quynh
c01dcf0a14
fix merge conflicts
2017-03-10 21:04:33 +08:00
Matt Thomas
2749b8412e
fix register widths for MIPS64 reg_read/write ( #775 )
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* fix register widths for MIPS64 reg_read/write
* fix preprocessor typedef error for qemu/target-mips
2017-03-08 08:40:30 +08:00
xorstream
69ae8f7987
Fix for MIPS issue. ( #733 )
2017-01-23 12:39:34 +08:00
xorstream
72a497bc14
Added MIPS support and projects for all samples.
2017-01-23 01:05:08 +11:00
xorstream
770c5616e2
Automated leading tab to spaces conversion.
2017-01-21 12:28:22 +11:00
xorstream
fac6a66860
platform.h move #3
2017-01-21 00:13:21 +11:00
xorstream
92392e0f57
Merge with current master.
2017-01-20 18:22:28 +11:00
Nguyen Anh Quynh
b678512fc1
remove kvm stuffs
2017-01-20 01:03:59 +08:00
xorstream
1aeaf5c40d
This code should now build the x86_x64-softmmu part 2.
2017-01-19 22:50:28 +11:00
Nguyen Anh Quynh
0640b35943
mips: remove qemu/hw/mips/mips_int.c
2017-01-19 13:07:28 +08:00
Chris Eagle
fccbcfd4c2
revert to use of g_free to make future qemu integrations easier ( #695 )
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* revert to use of g_free to make future qemu integrations easier
* bracing
2016-12-21 22:28:36 +08:00
Chris Eagle
e46545f722
remove glib dependency by provide compatible replacements
2016-12-18 14:56:58 -08:00
Nguyen Anh Quynh
c59e06d798
mips: fix some compilation warnings
2016-10-22 13:36:37 +08:00
Nguyen Anh Quynh
b7cdbe7a88
Merge branch 'feat/reg_save_restore' of https://github.com/rhelmot/unicorn into rhelmot-feat/reg_save_restore
2016-10-07 09:57:07 +08:00
Ryan Hileman
cb615fdba7
remove uc->cpus
2016-09-23 07:38:21 -07:00
Andrew Dutcher
0ef2b5fd71
New feature: registers can be bulk saved/restored in an opaque blob
2016-08-20 04:14:07 -07:00
Andrew Dutcher
97b10da133
Undo the disaster that was the patch to unicorn github issue #266 and fix it correctly. makes normal self-modifying code work.
2016-08-09 19:35:20 -07:00
danghvu
27e0699ef5
mips: Fix memleak
2016-07-09 20:16:00 -05:00
Ryan Hileman
acd88856e1
add batched reg access
2016-04-04 20:51:38 -07:00
Hiroyuki UEKAWA
c5888e5670
move macros in qemu/target-*/unicorn*.c to uc_priv.h
2016-03-02 12:43:02 +09:00
Hiroyuki UEKAWA
1cd3c3093b
fix WRITE_BYTE_H
2016-03-02 10:51:50 +09:00
Nguyen Anh Quynh
5a04bcb115
allow to change PC during callback. this solves issue #210
2016-01-28 14:06:17 +08:00
Nguyen Anh Quynh
2341f5dd1a
code style
2016-01-26 17:37:48 +08:00
Ryan Hileman
0886ae8ede
rework code/block tracing
2016-01-22 18:42:27 -08:00
Ryan Hileman
93052f6566
refactor to allow multiple hooks for one type
2016-01-22 18:41:43 -08:00
Nguyen Anh Quynh
4117a111eb
mips: handle hook callback for blikely instruction properly. this fixes issue #330 , #331
2015-12-23 01:40:03 +08:00
Nguyen Anh Quynh
4f268febb4
mips: check for exit request after every hooked instruction. this fix issue #329
2015-12-20 12:23:36 +08:00
Nguyen Anh Quynh
8d3265d9e1
mips: remove unused variable is_bc_slot
2015-12-16 23:06:17 +08:00
xorstream
395251d3e8
Fix codehook for MIPS instructions in delay slot
2015-12-15 17:02:56 +11:00
Nguyen Anh Quynh
bc63102e50
mips: only patch instruction size when there is a callback on the instruction. this fixes issue #282
2015-12-13 13:11:40 +08:00
Nguyen Anh Quynh
2f297bdd3a
handle some errors properly so avoid exit() during initialization. this fixes issue #237
2015-11-12 01:43:41 +08:00
Nguyen Anh Quynh
3a36e327ab
support memory redirection, so the issue #217 is fixed
2015-10-27 14:37:03 +08:00
Nguyen Anh Quynh
2b0b4169bc
mips: advance PC for SYSCALL instruction. this fixes issue #157
2015-09-28 10:58:43 +08:00
Nguyen Anh Quynh
53ce8f217d
mips: handle delay slot better for branch instructions. this should fix issue #155
2015-09-27 15:05:40 +08:00
Nguyen Anh Quynh
886946dcf4
do not use syscall to quit emulation. this can fix issues #147 & #148
2015-09-26 16:49:00 +08:00
Nguyen Anh Quynh
14a01b5186
mips: handle delay slot so do not duplicate calling instruction handler. this fixes issue #133
2015-09-22 11:59:53 +08:00
