# # RISC-V translation routines for the RVXI Base Integer Instruction Set. # # Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de # Bastian Koppelmann, kbastian@mail.uni-paderborn.de # # This program is free software; you can redistribute it and/or modify it # under the terms and conditions of the GNU General Public License, # version 2 or later, as published by the Free Software Foundation. # # This program is distributed in the hope it will be useful, but WITHOUT # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for # more details. # # You should have received a copy of the GNU General Public License along with # this program. If not, see . # Fields: %rs3 27:5 %rs2 20:5 %rs1 15:5 %rd 7:5 %sh10 20:10 %csr 20:12 %rm 12:3 # immediates: %imm_i 20:s12 %imm_s 25:s7 7:5 %imm_b 31:s1 7:1 25:6 8:4 !function=ex_shift_1 %imm_j 31:s1 12:8 20:1 21:10 !function=ex_shift_1 %imm_u 12:s20 !function=ex_shift_12 # Argument sets: &b imm rs2 rs1 &shift shamt rs1 rd &atomic aq rl rs2 rs1 rd # Formats 32: @r ....... ..... ..... ... ..... ....... %rs2 %rs1 %rd @i ............ ..... ... ..... ....... imm=%imm_i %rs1 %rd @b ....... ..... ..... ... ..... ....... &b imm=%imm_b %rs2 %rs1 @s ....... ..... ..... ... ..... ....... imm=%imm_s %rs2 %rs1 @u .................... ..... ....... imm=%imm_u %rd @j .................... ..... ....... imm=%imm_j %rd @sh ...... ...... ..... ... ..... ....... &shift shamt=%sh10 %rs1 %rd @csr ............ ..... ... ..... ....... %csr %rs1 %rd @atom_ld ..... aq:1 rl:1 ..... ........ ..... ....... &atomic rs2=0 %rs1 %rd @atom_st ..... aq:1 rl:1 ..... ........ ..... ....... &atomic %rs2 %rs1 %rd @r4_rm ..... .. ..... ..... ... ..... ....... %rs3 %rs2 %rs1 %rm %rd @r_rm ....... ..... ..... ... ..... ....... %rs2 %rs1 %rm %rd @r2_rm ....... ..... ..... ... ..... ....... %rs1 %rm %rd @r2 ....... ..... ..... ... ..... ....... %rs1 %rd # *** RV32I Base Instruction Set *** lui .................... ..... 0110111 @u auipc .................... ..... 0010111 @u jal .................... ..... 1101111 @j jalr ............ ..... 000 ..... 1100111 @i beq ....... ..... ..... 000 ..... 1100011 @b bne ....... ..... ..... 001 ..... 1100011 @b blt ....... ..... ..... 100 ..... 1100011 @b bge ....... ..... ..... 101 ..... 1100011 @b bltu ....... ..... ..... 110 ..... 1100011 @b bgeu ....... ..... ..... 111 ..... 1100011 @b lb ............ ..... 000 ..... 0000011 @i lh ............ ..... 001 ..... 0000011 @i lw ............ ..... 010 ..... 0000011 @i lbu ............ ..... 100 ..... 0000011 @i lhu ............ ..... 101 ..... 0000011 @i sb ....... ..... ..... 000 ..... 0100011 @s sh ....... ..... ..... 001 ..... 0100011 @s sw ....... ..... ..... 010 ..... 0100011 @s addi ............ ..... 000 ..... 0010011 @i slti ............ ..... 010 ..... 0010011 @i sltiu ............ ..... 011 ..... 0010011 @i xori ............ ..... 100 ..... 0010011 @i ori ............ ..... 110 ..... 0010011 @i andi ............ ..... 111 ..... 0010011 @i slli 00.... ...... ..... 001 ..... 0010011 @sh srli 00.... ...... ..... 101 ..... 0010011 @sh srai 01.... ...... ..... 101 ..... 0010011 @sh add 0000000 ..... ..... 000 ..... 0110011 @r sub 0100000 ..... ..... 000 ..... 0110011 @r sll 0000000 ..... ..... 001 ..... 0110011 @r slt 0000000 ..... ..... 010 ..... 0110011 @r sltu 0000000 ..... ..... 011 ..... 0110011 @r xor 0000000 ..... ..... 100 ..... 0110011 @r srl 0000000 ..... ..... 101 ..... 0110011 @r sra 0100000 ..... ..... 101 ..... 0110011 @r or 0000000 ..... ..... 110 ..... 0110011 @r and 0000000 ..... ..... 111 ..... 0110011 @r fence ---- pred:4 succ:4 ----- 000 ----- 0001111 fence_i ---- ---- ---- ----- 001 ----- 0001111 csrrw ............ ..... 001 ..... 1110011 @csr csrrs ............ ..... 010 ..... 1110011 @csr csrrc ............ ..... 011 ..... 1110011 @csr csrrwi ............ ..... 101 ..... 1110011 @csr csrrsi ............ ..... 110 ..... 1110011 @csr csrrci ............ ..... 111 ..... 1110011 @csr # *** RV32M Standard Extension *** mul 0000001 ..... ..... 000 ..... 0110011 @r mulh 0000001 ..... ..... 001 ..... 0110011 @r mulhsu 0000001 ..... ..... 010 ..... 0110011 @r mulhu 0000001 ..... ..... 011 ..... 0110011 @r div 0000001 ..... ..... 100 ..... 0110011 @r divu 0000001 ..... ..... 101 ..... 0110011 @r rem 0000001 ..... ..... 110 ..... 0110011 @r remu 0000001 ..... ..... 111 ..... 0110011 @r # *** RV32A Standard Extension *** lr_w 00010 . . 00000 ..... 010 ..... 0101111 @atom_ld sc_w 00011 . . ..... ..... 010 ..... 0101111 @atom_st amoswap_w 00001 . . ..... ..... 010 ..... 0101111 @atom_st amoadd_w 00000 . . ..... ..... 010 ..... 0101111 @atom_st amoxor_w 00100 . . ..... ..... 010 ..... 0101111 @atom_st amoand_w 01100 . . ..... ..... 010 ..... 0101111 @atom_st amoor_w 01000 . . ..... ..... 010 ..... 0101111 @atom_st amomin_w 10000 . . ..... ..... 010 ..... 0101111 @atom_st amomax_w 10100 . . ..... ..... 010 ..... 0101111 @atom_st amominu_w 11000 . . ..... ..... 010 ..... 0101111 @atom_st amomaxu_w 11100 . . ..... ..... 010 ..... 0101111 @atom_st # *** RV32F Standard Extension *** flw ............ ..... 010 ..... 0000111 @i fsw ....... ..... ..... 010 ..... 0100111 @s fmadd_s ..... 00 ..... ..... ... ..... 1000011 @r4_rm fmsub_s ..... 00 ..... ..... ... ..... 1000111 @r4_rm fnmsub_s ..... 00 ..... ..... ... ..... 1001011 @r4_rm fnmadd_s ..... 00 ..... ..... ... ..... 1001111 @r4_rm fadd_s 0000000 ..... ..... ... ..... 1010011 @r_rm fsub_s 0000100 ..... ..... ... ..... 1010011 @r_rm fmul_s 0001000 ..... ..... ... ..... 1010011 @r_rm fdiv_s 0001100 ..... ..... ... ..... 1010011 @r_rm fsqrt_s 0101100 00000 ..... ... ..... 1010011 @r2_rm fsgnj_s 0010000 ..... ..... 000 ..... 1010011 @r fsgnjn_s 0010000 ..... ..... 001 ..... 1010011 @r fsgnjx_s 0010000 ..... ..... 010 ..... 1010011 @r fmin_s 0010100 ..... ..... 000 ..... 1010011 @r fmax_s 0010100 ..... ..... 001 ..... 1010011 @r fcvt_w_s 1100000 00000 ..... ... ..... 1010011 @r2_rm fcvt_wu_s 1100000 00001 ..... ... ..... 1010011 @r2_rm fmv_x_w 1110000 00000 ..... 000 ..... 1010011 @r2 feq_s 1010000 ..... ..... 010 ..... 1010011 @r flt_s 1010000 ..... ..... 001 ..... 1010011 @r fle_s 1010000 ..... ..... 000 ..... 1010011 @r fclass_s 1110000 00000 ..... 001 ..... 1010011 @r2 fcvt_s_w 1101000 00000 ..... ... ..... 1010011 @r2_rm fcvt_s_wu 1101000 00001 ..... ... ..... 1010011 @r2_rm fmv_w_x 1111000 00000 ..... 000 ..... 1010011 @r2