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05add081a3
unicorn/qemu
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Peter Maydell 05add081a3
target/arm: Handle SFPA and FPCA bits in reads and writes of CONTROL 
The M-profile CONTROL register has two bits -- SFPA and FPCA --
which relate to floating-point support, and should be RES0 otherwise.
Handle them correctly in the MSR/MRS register access code.
Neither is banked between security states, so they are stored
in v7m.control[M_REG_S] regardless of current security state.

Backports commit 2e1c5bcd32014c9ede1b604ae6c2c653de17fc53 from qemu
2019-04-30 10:21:24 -04:00
..
accel cputlb: Fix io_readx() to respect the access_type 2019-04-30 10:11:11 -04:00
crypto
default-configs target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
docs
fpu qemu/fpu: Synchronize with Qemu 2019-03-09 18:27:31 -05:00
hw target/riscv: Initial introduction of the RISC-V target 2019-03-08 21:46:10 -05:00
include tcg: Hoist max_insns computation to tb_gen_code 2019-04-30 09:49:57 -04:00
qapi qapi: Rewrite string-input-visitor's integer and list parsing 2018-12-18 04:57:25 -05:00
qobject
qom qom/cpu: Add cluster_index to CPUState 2019-01-30 12:59:59 -05:00
scripts decodetree: Properly diagnose fields overflowing an insn 2019-03-13 11:21:04 -04:00
target target/arm: Handle SFPA and FPCA bits in reads and writes of CONTROL 2019-04-30 10:21:24 -04:00
tcg tcg/arm: Restrict constant pool displacement to 12 bits 2019-04-30 10:10:21 -04:00
util target/arm: Handle AArch32 CRC instructions 2019-04-27 10:50:25 -04:00
aarch64.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
aarch64eb.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
accel.c
arm.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
armeb.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
CODING_STYLE
configure configure: Disable W^X on OpenBSD 2019-03-11 16:46:52 -04:00
COPYING
COPYING.LIB
cpus.c
exec.c exec.c: refactor function flatview_add_to_dispatch() 2019-03-11 17:00:46 -04:00
gen_all_header.sh
glib_compat.c target/arm/translate: Synchronize with Qemu 2019-04-27 10:13:01 -04:00
HACKING
header_gen.py tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
ioport.c
LICENSE
m68k.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
Makefile config-all-devices.mak: rebuild on reconfigure 2019-03-29 19:31:32 -04:00
Makefile.objs
Makefile.target configure: Remove old -fno-gcse workaround for GCC 4.6.x and 4.7.[012] 2018-12-18 03:52:36 -05:00
memory_ldst.inc.c
memory_mapping.c
memory.c cputlb: Synchronize with qemu 2019-04-26 15:48:45 -04:00
mips64.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
mips64el.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
mips.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
mipsel.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
powerpc.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
qemu-timer.c
riscv32.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
riscv64.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
rules.mak
sparc64.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
sparc.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00
unicorn_common.h
VERSION Open 4.1 development tree 2019-04-24 11:59:00 -04:00
vl.c
vl.h
x86_64.h tcg: Implement tcg_gen_extract2_{i32,i64} 2019-04-30 09:20:45 -04:00